參數(shù)資料
型號(hào)： IBM39MPEGCS24DPFA16C
廠商： IBM Microeletronics
英文描述： High Performance Audio/Video Decoder(高性能音頻/視頻譯碼器)
中文描述： 高性能音頻/視頻解碼器（高性能音頻/視頻譯碼器）
文件頁(yè)數(shù)： 7/22頁(yè)
文件大?。?/td> 278K
代理商： IBM39MPEGCS24DPFA16C
IBM39MPEGCS24PFA16C
IBM39MPEGCS24DPFA16C
High Performance Audio/Video Decoder
mpegcs24ds.00
12/10/99 Summary Datasheet
Audio Decoder
Page 7 of 21
Audio Decoder
The IBM39MPEGCS24PFA16C/DPFA16C each contain two audio decoders. The decoders are configured
by the host processor through its own set of host accessible registers.
Both of the audio decoders in the IBM39MPEGCS24DPFA16C device can perform Dolby Digital decoding as
well as MPEG decoding. The IBM39MPEGCS24PFA16C device has no Dolby Digital capabilities.
Audio Input
The audio decoder receives and decodes either PES (Packetized Elementary Stream) or ES (Elementary
Stream) audio data via a 20-bit Digital Signal Processor (DSP) engine. Compressed audio data can be
received from the audio PID in the transport stream through the transport demultiplexer or through the host
data bus as a PES or ES Stream. Input bit rate is supported up to 640 Kbps.
The audio DSP is a 20-bit computational engine which decodes the audio MPEG and Dolby Digital bit-
streams, and formats PCM data for playback. PCM playback, and the MPEG and Dolby Digital algorithms,
are executed via microcode, which is downloaded through the Host Interface.
Tone Generation
The audio decoder is capable of generating a specified tone frequency with a duration from 0.1 second to 3
seconds. The user may select from 128 possible tones, 31 durations and 8 attenuations. The tones are over
10 octaves of American Standard pitch (“A” = 440 Hz). Audio attenuation is performed in 64 steps with
smooth transitions between steps.
Audio Output
The audio decoder supports the playback of either 16-, 18-, or 20-bit unformatted PCM bitstreams. Six sam-
pling frequencies (16, 22.05, 24, 32, 44.1, and 48 kHz) are supported for unformatted PCM bitstreams. Both
one channel (mono) and two channel (stereo) output is supported for MPEG decoding and PCM inputs, while
up to six channels are possible for Dolby Digital decoding.
The interface can be programmed to support the I
2
S mode, the Left Justified mode, or the Right Justified
mode. To maximize compatibility with a wide variety of audio DACs, the Audio CLK signal can be pro-
grammed to 64 times the sampling clock to support the 20-bit output sample or 32 times to support the 16-bit
output sample.
In addition to the PCM output, a S/PDIF (IEC958) interface is provided. This interface can either output
encoded Dolby Digital (AC-3) data while decoding a Dolby Digital (AC-3) stream, or one of three pairs of
channels of PCM data.
Synchronization
The audio decoder synchronizes the decoding of the audio stream to the STC which is set by the host pro-
cessor by comparing PTS with the STC. If the difference exceeds the tolerance, the decoder skips or repeats
samples. Audio synchronization can be disabled.
Audio / video synchronization is supported with PTS/STC comparison on each audio frame. There is a built-in
phase-locked-loop to provide the audio clocks for audio and video synchronization.
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