參數(shù)資料
型號(hào)： IBM42M10SCYAA10
廠商： IBM Microeletronics
英文描述： 1063 MB/S Gigabit Link Module(1063 MB/S 吉位連接模塊（高性能集成光纖收發(fā)器）)
中文描述： 1063 MB / s的千兆連接模塊（1063 MB /秒吉位連接模塊（高性能集成光纖收發(fā)器））
文件頁數(shù)： 15/31頁
文件大?。?/td> 511K
代理商： IBM42M10SCYAA10
IBM42M10SCYAA10
IBM42M10LCYAA20
1063Mb/s Gigabit Link Module
glm1063.02.fm.02
Feb. 15, 2000
Page 15 of 30
Operation
Powering On: Initial Card Outputs
Receive Data outputs are random.
Comma Detect will be random.
Receive Byte Clocks will run between 27 and 106MHz.
Fault is low.
Link Unusable is high.
Ping Pong Interface Available
A shortwave 1063Mb/s GLM that utilizes a 20 bit, ping ponged interface is available as a distinct IBM product.
This interface is designed to reduce simultaneous switching noise. The ping-ponged interface is designed
into the module and is not user selectable (determined only by part number).
Tx[00:09] is timed off the rising edge of the Transmit Byte Clock as shown below. Tx[10:19] is timed off the
rising edge of TBC plus one half of the TBC period using identical timing specifications as in
“
Transmit Data
(Tx[00:19])
”
on page 13.
Rx[00:09] is timed off of RBC[0] as shown in the IBM42M10LCYAA20 portion of the OFC Timings on page
23. Rx[10:19] is timed off RBC[1] using identical timing specifications as in Receive Data (Rx[00:19]) on page
9. The skew between RBC[0] and RBC[1] shall not exceed
±
1.5ns.
Ping Pong Interface Timings
Transmit
Byte Clock
Tx[00:09]
Data must be valid
>3.3ns
>2.0ns
Note:
positive edge of the Transmit Byte Clock.
All critical timings are referenced to the
Tx[10:19]
>12.7ns
<7.4ns
Clock and Data Timing for Ping Pong Interface
Receive Timing for Ping Pong Interface
Rx[00:09]
Valid
Comma
Detect
>2.5ns
RBC[1]
>6.0ns
18.8ns
18.8ns
K28.5
Data
Note: All critical timings are referenced to the
negative edge of the clocks.
Data
Data
Rx[10:19]
Valid
RBC[0]
>2.5ns
>6.0ns
>2.5ns
>6.0ns
18.8ns
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IBM42M10SNYAA20 1063 MB/S Gigabit Link Module(1063 MB/S 吉位連接模塊（高性能集成光纖收發(fā)器）)
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