參數(shù)資料
型號: IBMN312164CT3
廠商: IBM Microeletronics
英文描述: 128Mb(8Mbit x 4 I/O x 4 Bank) Synchronous DRAM(128M位(8M位 x 4 I/O x 4 組)同步動態(tài)RAM)
中文描述: 128Mb的(8Mbit × 4的I / O × 4行)同步DRAM(128兆位(800萬位× 4的I / O × 4組)同步動態(tài)RAM)的
文件頁數(shù): 16/66頁
文件大?。?/td> 1696K
代理商: IBMN312164CT3
IBMN312164CT3
IBMN312404CT3
128Mb Synchronous DRAM - Die Revision B
IBMN312804CT3
Preliminary
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 16 of 66
06K7582.H03335A
10/00
Non-Minimum Write to Read Interval
COMMAND
WRITE A
READ B
NOP
NOP
NOP
NOP
NOP
NOP
t
CK2
,
DQs
CAS latency = 2
DIN A
0
t
CK3
,
DQs
CAS latency = 3
DIN A
0
CK
T0
T2
T1
T3
T4
T5
T6
T7
T8
Input data for the Write is masked.
Input data must be removed from the DQs at least one clock
cycle before the Read data appears on the outputs to avoid
data contention.
DOUT B
0
DOUT B
1
DOUT B
2
DOUT B
3
DOUT B
0
DOUT B
1
DOUT B
2
DOUT B
3
NOP
DIN A
1
DIN A
1
(Burst Length = 4, CAS latency = 2, 3)
: “H” or “L”
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