參數(shù)資料
型號: IBMN312404CT3
廠商: IBM Microeletronics
英文描述: 128Mb(2Mbit x 16 I/O x 4 Bank) Synchronous DRAM(128M位(2M位 x 16 I/O x 4 組)同步動態(tài)RAM)
中文描述: 128Mb的(2Mbit的× 16的I / O × 4行)同步DRAM(128兆位(200萬位× 16的I / O × 4組)同步動態(tài)RAM)的
文件頁數(shù): 41/66頁
文件大小: 1696K
代理商: IBMN312404CT3
IBMN312164CT3
IBMN312804CT3
IBMN312404CT3
Preliminary
128Mb Synchronous DRAM - Die Revision B
06K7582.H03335A
10/00
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 41 of 66
Timing Diagrams
Page
AC Parameters for Write Timing............................................................................................................... 42
AC Parameters for Read Timing (3/3/3), BL=4......................................................................................... 43
AC Parameters for Read Timing (2/2/2), BL=2......................................................................................... 44
AC Parameters for Read Timing (3/2/2), BL=2......................................................................................... 45
AC Parameters for Read Timing (3/3/3), BL=2......................................................................................... 46
Mode Register Set.................................................................................................................................... 47
Power on Sequence and Auto Refresh (CBR) ......................................................................................... 48
Clock Suspension / DQM During Burst Read .......................................................................................... 49
Clock Suspension / DQM During Burst Write .......................................................................................... 50
Power Down Mode and Clock Suspend................................................................................................... 51
Auto Refresh (CBR).................................................................................................................................. 52
Self Refresh (Entry and Exit).................................................................................................................... 53
Random Row Read (Interleaving Banks) with Precharge, BL=8.............................................................. 54
Random Row Read (Interleaving Banks) with Auto-precharge, BL=8...................................................... 55
Random Row Write (Interleaving Banks) with Auto-Precharge, BL=8 ..................................................... 56
Random Row Write (Interleaving Banks) with Precharge, BL=8.............................................................. 57
Read/Write Cycle
................................................................................................................................ 58
Interleaved Column Read Cycle............................................................................................................... 59
Auto Precharge after a Read Burst, BL=4................................................................................................ 60
Auto Precharge after a Write Burst, BL=4................................................................................................ 61
Burst Read and Single Write Operation ................................................................................................... 62
CS Function (Only CS signal needs to be asserted at minimum rate) ..................................................... 63
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IBMN312804CT3 128Mb(4Mbit x 8 I/O x 4 Bank) Synchronous DRAM(128M位(4M位 x 8 I/O x 4 組)同步動態(tài)RAM)
IBMN312164CT3 128Mb(8Mbit x 4 I/O x 4 Bank) Synchronous DRAM(128M位(8M位 x 4 I/O x 4 組)同步動態(tài)RAM)
IBMN325404CT3 256Mb(4Mbit x 16 I/O x 4 Bank) Synchronous DRAM(256M位(4M位 x 16 I/O x 4 組)同步動態(tài)RAM)
IBMN325804CT3 256Mb(8Mbit x 8 I/O x 4 Bank) Synchronous DRAM(256M位(8M位 x 8 I/O x 4 組)同步動態(tài)RAM)
IBMN325164CT3 256Mb(16Mbit x 4 I/O x 4 Bank) Synchronous DRAM(256M位(16M位 x 4 I/O x 4 組)同步動態(tài)RAM)
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