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| 型號(hào)： | IBMN312804CT3 |
| 廠商： | IBM Microeletronics |
| 英文描述： | 128Mb(4Mbit x 8 I/O x 4 Bank) Synchronous DRAM(128M位(4M位 x 8 I/O x 4 組)同步動(dòng)態(tài)RAM) |
| 中文描述： | 128Mb的（的4Mb × 8的I / O × 4行）同步DRAM（128兆位（4分位× 8的I / O × 4組）同步動(dòng)態(tài)RAM）的 |
| 文件頁(yè)數(shù)： | 11/66頁(yè) |
| 文件大?。?/td> | 1696K |
| 代理商： | IBMN312804CT3 |
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IBMN312164CT3
IBMN312804CT3
IBMN312404CT3
Preliminary
128Mb Synchronous DRAM - Die Revision B
06K7582.H03335A
10/00
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 11 of 66
Burst Read Command
The Burst Read command is initiated by having CS and CAS low while holding RAS and WE high at the rising
edge of the clock. The address inputs determine the starting column address for the burst, the Mode Register
sets the type of burst (sequential or interleave) and the burst length (1, 2, 4, 8). The delay from the start of the
command to when the data from the first cell appears on the outputs is equal to the value of the CAS latency
that is set in the Mode Register.
Read Interrupted by a Read
A Burst Read may be interrupted before completion of the burst by another Read Command, with the only
restriction being that the interval that separates the commands must be at least one clock cycle. When the
previous burst is interrupted, the remaining addresses are overridden by the new address with the full burst
length. The data from the first Read Command continues to appear on the outputs until the CAS latency from
the interrupting Read Command is satisfied, at this point the data from the interrupting Read Command
appears.
Burst Read Operation
Read Interrupted by a Read
COMMAND
READ A
NOP
NOP
NOP
NOP
NOP
NOP
NOP
DOUT A
0
CAS latency = 2
t
CK2
,
DQs
t
CK3
,
DQs
CAS latency = 3
DOUT A
1
DOUT A
2
DOUT A
3
NOP
CK
T0
T2
T1
T3
T4
T5
T6
T7
T8
DOUT A
0
DOUT A
1
DOUT A
2
DOUT A
3
(Burst Length = 4, CAS latency = 2, 3)
COMMAND
READ A
READ B
NOP
NOP
NOP
NOP
NOP
NOP
t
CK2
,
DQs
CAS latency = 2
t
CK3
,
DQs
CAS latency = 3
NOP
CK
T0
T2
T1
T3
T4
T5
T6
T7
T8
DOUT B
0
DOUT B
1
DOUT B
2
DOUT B
3
DOUT A
0
DOUT B
0
DOUT B
1
DOUT B
2
DOUT B
3
DOUT A
0
(Burst Length = 4, CAS latency = 2, 3)
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