參數(shù)資料
型號(hào): IBMN625404GT3B
廠商: IBM Microeletronics
英文描述: 256Mb Double Data Rate Synchronous DRAM(256M位雙數(shù)據(jù)速率同步動(dòng)態(tài)RAM)
中文描述: 256MB雙數(shù)據(jù)速率同步DRAM(256M位雙數(shù)據(jù)速率同步動(dòng)態(tài)RAM)的
文件頁數(shù): 36/79頁
文件大?。?/td> 1328K
代理商: IBMN625404GT3B
IBMN625404GT3B
IBMN625804GT3B
256Mb Double Data Rate Synchronous DRAM
Preliminary
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 36 of 79
29L0011.E36997B
1/01
Write to Read: Non-Interrupting (CAS Latency = 2; Burst Length = 4)
CL = 2
T1
T2
T3
T4
T5
T6
t
WTR
NOP
NOP
NOP
Read
Write
DI a-b
NOP
DI a-b = data in for bank a, column b.
3 subsequent elements of data in are applied in the programmed order following DI a-b.
A non-interrupted burst is shown.
t
WTR
is referenced from the first positive CK edge after the last data in pair.
A10 is Low with the Write command (Auto Precharge is disabled).
The Read and Write commands may be to any bank.
CK
CK
Command
Address
DQS
DQ
DM
Don’t Care
Maximum D
QSS
BAa, COL b
BAa, COL n
T1
T2
T3
T4
T5
T6
t
WTR
NOP
NOP
NOP
Read
Write
NOP
CK
CK
Command
Address
Minimum D
QSS
BAa, COL b
BAa, COL n
t
DQSS
(max)
DI a-b
DQS
DQ
DM
t
DQSS
(min)
CL = 2
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