參數(shù)資料
型號(hào)： IBMN625804GT3B
廠商： IBM Microeletronics
英文描述： 256Mb Double Data Rate Synchronous DRAM(256M位雙數(shù)據(jù)速率同步動(dòng)態(tài)RAM)
中文描述： 256MB雙數(shù)據(jù)速率同步DRAM（256M位雙數(shù)據(jù)速率同步動(dòng)態(tài)RAM）的
文件頁(yè)數(shù)： 62/79頁(yè)
文件大?。?/td> 1328K
代理商： IBMN625804GT3B
IBMN625404GT3B
IBMN625804GT3B
256Mb Double Data Rate Synchronous DRAM
Preliminary
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 62 of 79
29L0011.E36997B
1/01
17. An input setup and hold time derating table is used to increase t
IS
and t
IH
in the case where the input slew
rate is below 0.5 V/ns.
18. An input setup and hold time derating table is used to increase t
DS
and t
DH
in the case where the I/O slew
rate is below 0.5 V/ns.
19. An I/O Delta Rise, Fall Derating table is used to increase t
DS
and t
DH
in the case where DQ, DM, and
DQS slew rates differ.
Input Slew Rate
t
IS
t
IH
Unit
Note
0.5 V/ns
0
0
ps
1, 2
0.4 V/ns
+ 50
0
ps
1, 2
0.3 V/ns
+ 100
0
ps
1, 2
1. Input slew rate is based on the lesser of the slew rates determined by either V
IH (AC)
to V
IL (AC)
or V
IH (DC)
to V
IL (DC)
, similarly for
rising transitions.
2. These derating parameters may be guaranteed by design or tester characterization and are not necessarily tested on each
device.
Input Slew Rate
t
DS
t
DH
Unit
Note
0.5 V/ns
0
0
ps
1, 2
0.4 V/ns
+ 75
+ 75
ps
1, 2
0.3 V/ns
+ 150
+ 150
ps
1, 2
1. I/O slew rate is based on the lesser of the slew rates determined by either V
IH (AC)
to V
IL (AC)
or V
IH (DC)
to V
IL (DC)
, similarly for
rising transitions.
2. These derating parameters may be guaranteed by design or tester characterization and are not necessarily tested on each
device.
Delta Rise and Fall Rate
t
DS
t
DH
Unit
Note
0.0 ns/V
0
0
ps
1, 2,
3, 4
0.25 ns/V
+ 50
+ 50
ps
1, 2,
3, 4
0.5 ns/V
+ 100
+ 100
ps
1, 2,
3, 4
1. Input slew rate is based on the lesser of the slew rates determined by either V
IH (AC)
to V
IL (AC)
or V
IH (DC)
to V
IL (DC)
, similarly for
rising transitions.
2. Input slew rate is based on the larger of AC to AC delta rise, fall rate and DC to DC delta rise, fall rate.
3. The delta rise, fall rate is calculated as: [1/(slew rate 1)] - [1/(slew rate 2)]
For example: slew rate 1 = 0.5 V/ns; slew rate 2 = 0.4 V/ns
Delta rise, fall = (1/0.5) - (1/0.4) [ns/V]
= -0.5 ns/V
Using the table above, this would result in an increase in t
DS
and t
DH
of 100 ps.
4. These derating parameters may be guaranteed by design or tester characterization and are not necessarily tested on each
device.
相關(guān)PDF資料
PDF描述
ICM7321 SINGLE 12/10/8-BIT VOLTAGE-OUTPUT DACS
ICM7321M SINGLE 12/10/8-BIT VOLTAGE-OUTPUT DACS
ICM7321MG SINGLE 12/10/8-BIT VOLTAGE-OUTPUT DACS
ICM7321S SINGLE 12/10/8-BIT VOLTAGE-OUTPUT DACS
ICM7321SG SINGLE 12/10/8-BIT VOLTAGE-OUTPUT DACS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IBMPPC403GAJC33C1 制造商:IBM 功能描述:
IBMPPC750CLGEQ4023 制造商:IBM 功能描述:MPU 750CL RISC 32BIT 90NM 400MHZ 1.15V/1.8V 278FCBGA - Trays
IBMPPC750CLGEQ5023 制造商:IBM Microelectronics 功能描述:MPU 750CL RISC 32BIT 90NM 500MHZ 1.15V/1.8V 278FCBGA - Trays
IBMPPC750CLGEQA033 制造商:IBM 功能描述:MPU 750CL RISC 32BIT 90NM 1GHZ 1.15V/1.8V 278FCBGA - Trays 制造商:IBM 功能描述:IBMIBMPPC750CLGEQA033 CPU PPC 750CL 1GHZ
IBN100 制造商:Hubbell Wiring Device-Kellems 功能描述:ICON, BLANK,BR,100PK
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*