
Development Support
MC68HC908QYA/QTA Family Data Sheet, Rev. 3
146
Freescale Semiconductor
Figure 15-10. Monitor Mode Circuit (External Clock, with High Voltage)
Figure 15-11. Monitor Mode Circuit (External Clock, No High Voltage)
9.8304 MHz CLOCK
+
10 kΩ
*
VDD
10 kΩ
*
RST (PTA3)
IRQ (PTA2)
PTA0
OSC1 (PTA5)
8
7
DB9
2
3
5
16
15
2
6
10
9
VDD
MAX232
V+
V–
1 μF
+
1
2
3
4
5
6
74HC125
10 kΩ
PTA1
PTA4
VSS
0.1 μF
VDD
1 kΩ
9.1 V
C1+
C1–
5
4
1 μF
C2+
C2–
+
3
1
1 μF
+
1 μF
VDD
+
1 μF
VTST
* Value not critical
VDD
10 kΩ
*
RST (PTA3)
IRQ (PTA2)
PTA0
OSC1 (PTA5)
8
7
DB9
2
3
5
16
15
2
6
10
9
VDD
1 μF
MAX232
V+
V–
VDD
1 μF
+
1
2
3
4
5
6
74HC125
10 kΩ
N.C.
PTA1
N.C.
PTA4
VSS
0.1 μF
VDD
9.8304 MHz CLOCK
C1+
C1–
5
4
1 μF
C2+
C2–
+
3
1
1 μF
+
1 μF
VDD
10 kΩ
*
* Value not critical
N.C.