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參數(shù)資料
| 型號： | IBM13N16644HCC |
| 廠商： | IBM Microeletronics |
| 英文描述： | 16M x 64 Two-Bank Unbuffered SDRAM Module(16M x 64 2組不帶緩沖同步動態(tài)RAM模塊) |
| 中文描述： | 1,600 × 64雙行緩沖內(nèi)存模組（16米x 64 2組不帶緩沖同步動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 11/20頁 |
| 文件大?。?/td> | 378K |
| 代理商： | IBM13N16644HCC |
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 11 of 20
IBM13N16644HCC
IBM13N16734HCC
16M x 64/72 Two-Bank Unbuffered SDRAM Module
19L7296.E93875B
12/99
DC Output Load Circuit
Output Characteristics
(T
A
= 0 to +70
°
C, V
DD
= 3.3V
±
0.3V)
Symbol
Parameter
x64
x72
Units Notes
Min.
Max.
Min.
Max.
I
I(L)
Input Leakage Current, any input
(0.0V
≤
V
IN
≤
V
DD
), All Other Pins
Not Under Test = 0V
RAS, CAS, WE,
A0-A9, A10/AP, A11, BA0, BA1
-80
+80
-90
+90
μ
A
CK0, CK1
-20
+20
-25
+25
CK2, CK3
-20
+20
-20
+20
CKE0, CKE1
-40
+40
-45
+45
S0, S1
-20
+20
-25
+25
S2, S3
-20
+20
-20
+20
DQMB1, 5
-10
+10
-15
+15
DQMB0, 2, 3, 4, 5, 6, 7
-10
+10
-10
+10
DQ0 - 63
-10
+10
-10
+10
CB0 - 7
0
0
-10
+10
SA0, SA1, SA2, SCL, SDA
-10
+10
-10
+10
WP
-10
+50
-10
+50
I
O(L)
Output Leakage Current
(D
OUT
is disabled, 0.0V
≤
V
OUT
≤
V
DD
)
DQ0 - 63
-10
+10
-10
+10
μ
A
CB0 - 7
0
0
-10
+10
SDA
-10
+10
-10
+10
V
OH
Output Level (LVTTL)
Output “H” Level Voltage (I
OUT
= -2.0mA)
2.4
-
2.4
-
V
1
V
OL
Output Level (LVTTL)
Output “L” Level Voltage (I
OUT
= +2.0mA)
-
0.4
-
0.4
1. See DC output load circuit.
Output
1200
50pF
3.3 V
870
V
OH
(DC) = 2.4V, I
OH
= -2mA
V
OL
(DC) = 0.4V, I
OL
= 2mA
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