參數(shù)資料
型號: IC42S16102-6BIG
英文描述: 512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
中文描述: 為512k × 16位× 2銀行(16兆)內(nèi)存
文件頁數(shù): 28/78頁
文件大?。?/td> 790K
代理商: IC42S16102-6BIG
IC42S16102
28
Integrated Circuit Solution Inc.
DR042-0A 01/18/2005
Interval Between Write and Read Commands
A new read command can be executed while a write cycle
is in progress, i.e., before that cycle completes. Data
corresponding to the new read command is output after
the
CAS
latency has elapsed from the point the new read
command was executed. The I/On pins must be placed in
the HIGH impedance state at least one cycle before data
is output during this operation.
The interval (t
CCD
) between command must be at least one
clock cycle.
The selected bank must be set to the active state before
executing this command.
I/O
WRITE A0
READ B0
COMMAND
CLK
D
IN
A0
D
OUT
B0
D
OUT
B2
D
OUT
B1
D
OUT
B3
t
CCD
HI-Z
WRITE (CA=A, BANK 0)
READ (CA=B, BANK 0)
I/O
WRITE A0
READ B0
COMMAND
CLK
D
IN
A0
D
OUT
B0
D
OUT
B2
D
OUT
B1
D
OUT
B3
t
CCD
HI-Z
WRITE (CA=A, BANK 0)
READ (CA=B, BANK 0)
CAS
latency = 2, burst length = 4
CAS
latency = 3, burst length = 4
Don’t Care
相關(guān)PDF資料
PDF描述
IC42S16102-6T 512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
IC42S16102-6TG 512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
IC42S16102-6TI 512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
IC42S16102-6TIG 512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
IC42S16102-7BG 512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IC42S16102-6T 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
IC42S16102-6TG 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
IC42S16102-6TI 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
IC42S16102-6TIG 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bit x 2 Banks (16-MBIT) SDRAM
IC42S16102-7BG 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:512K x 16 Bit x 2 Banks (16-MBIT) SDRAM