參數(shù)資料
型號： IC42S16160-6TIG
英文描述： 4M x 16Bit x 4 Banks (256-MBIT) SDRAM
中文描述： 4米× 16 × 4銀行（256兆）內(nèi)存
文件頁數(shù)： 28/69頁
文件大小： 1219K
代理商： IC42S16160-6TIG
IC42S16160
28
Integrated Circuit Solution Inc.
DR037-0A 9/05/2003
Precharge Termination in WRITE Cycle
During WRITE cycle, the burst write operation is terminated by a precharge command.
When the precharge command is issued, the burst write operation is terminated and precharge starts.
The same bank can be activated again after t
RP
from the precharge command. The DQM must be high to mask
invalid data in.
During WRITE cycle, the write data written prior to the precharge command will be correctly stored. However, invalid
data may be written at the same clock as the precharge command. To prevent this from happening, DQM must be high
at the same clock as the precharge command. This will mask the invalid data.
PRECHARGE TERMINATION in WRITE Cycle
Burst lengh = X
CLK
Command
CAS latency = 2
DQM
Hi - Z
Write
T0
T1
T2
T3
T4
T5
T6
T7
T8
t
RP
PRE
ACT
DQ
Write
PRE
ACT
t
RP
CAS latency = 3
Hi - Z
D0
D3
D2
D1
D0
D3
D2
D1
DQM
D4
D4
command
DQ
相關(guān)PDF資料
PDF描述
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IC42S16160-7TIG 4M x 16Bit x 4 Banks (256-MBIT) SDRAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IC42S16160-7TG 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:4M x 16Bit x 4 Banks (256-MBIT) SDRAM
IC42S16160-7TIG 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:4M x 16Bit x 4 Banks (256-MBIT) SDRAM
IC42S16160B-7TL 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256-MBIT SYNCHRONOUS DRAM
IC42S16400 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 16Bit x 4 Banks (64-MBIT) SDRAM
IC42S16400-6BG 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 16Bit x 4 Banks (64-MBIT) SDRAM
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