參數(shù)資料
型號(hào)： IC43R16160-6TG
英文描述： 4M x 16 Bit x 4 Banks (256-MBIT) DDR SDRAM
中文描述： 4米× 16位× 4個(gè)銀行（256兆）DDR SDRAM內(nèi)存
文件頁(yè)數(shù)： 14/56頁(yè)
文件大?。?/td> 1271K
代理商： IC43R16160-6TG
Precharge Timing During Read Operation
For the earliest possible Precharge command without interrupting a Read burst, the Precharge command
may be issued on the rising clock edge which is CAS latency (CL) clock cycles before the end of the Read
burst. A new Bank Activate (BA) command may be issued to the same bank after the RAS precharge time
(t
RP
). A Precharge command can not be issued until t
RAS
(min) is satisfied.
Read with Precharge Timing as a Function of CAS Latency
T0
T1
T2
T3
T4
T5
T6
T7
T8
D
0
D
1
D
2
D
3
NOP
Read
NOP
NOP
Pre
A
NOP
BA
NOP
CK, CK
Command
DQS
DQ
t
RAS
(min)
t
RP
(min)
BA
NOP
T9
D
0
CAS Latency=2.5
D
1
D
2
D
3
DQS
DQ
CAS Latency=2
(CAS Latency = 2, 2.5, 3; Burst Length = 4)
IC4
3R16160
1
4
Integrated Circuit Solution Inc.
DDR001
-
0B
1
1
/
10
/
2004
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IC43R16160-7T 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:4M x 16 Bit x 4 Banks (256-MBIT) DDR SDRAM
IC43R16160-7TG 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:4M x 16 Bit x 4 Banks (256-MBIT) DDR SDRAM
IC43R16160E-5TL 制造商:Integrated Silicon Solution Inc 功能描述:256M, 2.5V, DDR, 16MX16, 200MHZ, 66 PIN
IC43R32400 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM
IC43R32400-4B 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:1M x 32 Bit x 4 Banks (128-MBIT) DDR SDRAM
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