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參數(shù)資料
| 型號： | ICL8068CDD |
| 廠商： | INTERSIL CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | 14-Bit/16-Bit, Microprocessor- Compatible, 2-Chip, A/D Converter |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, CDIP14 |
| 封裝： | CERDIP-14 |
| 文件頁數(shù)： | 12/19頁 |
| 文件大?。?/td> | 168K |
| 代理商： | ICL8068CDD |
3-45
FIGURE 7. ICL8052A (8068A)/71C03A 4
1
/
2
DIGIT A/D CONVERTER
V+
4
1
/
2
/ 3
1
/
2
POLARITY
RUN/HOLD
COMP IN
V-
REFERENCE
REF. CAP. 1
REF. CAP. 2
ANALOG IN
ANALOG GND
CLOCK IN
UNDER-RANGE
OVER-RANGE
BUSY
D
2
D
3
D
4
(MSB) B
8
B
2
(MSD) D
5
STROBE
A-Z IN
A-Z OUT
DIGITAL GND
(LSD) D
1
B
4
(LSB) B
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
V-
COMP OUT
REF CAP
REF BYPASS
GND
REF OUT
REF SUPPLY
INT OUT
+BUFF IN
+INT IN
-INT IN
-BUFF IN
BUFF OUT
V++
1
2
3
4
5
6
7
14
13
12
11
10
9
8
10
μ
F
-15V
10k
0.1
μ
F
+5V
SIGNAL
INPUT
CLOCK
IN
120kHz = 3
READINGS/SEC
150
150
4.7k
ICL71C03
ICL8068
10k
90k
a
b
c
d
e
f
g
B
1
B
2
B
3
B
4
7447
RBI
+5V
47k
1
2
3
4
5
36
k
10
k
10
μ
F
300
μ
F
-15V
300
k
1k
+15V
100
k
0.22
μ
F
1.0
μ
F
-15V
150
NOTE: For 3
1
/
2
digit, tie pin 2 low and change clock to 12kHz.
FIGURE 8. ICL8052-8068/71C03A PLASMA DISPLAY CIRCUIT
2.5k
47k
5k
+5V
POL
a
g
HI VOLTAGE BUFFER DI 505
POL D
5
D
4
D
3
D
2
D
1
B
8
B
4
B
2
B
1
71C03A
3k
+5V
0V
0.02
μ
F
0.02
μ
F
0.02
μ
F
GATES
ARE
7409
0.02
μ
F
0.02
μ
F
8052A/
8068A
a
g
V+
PROG
A
RBI BI D
DM8880
ICL8052/ICL71C03, ICL8068/ICL71C03
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|---|---|
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|---|---|
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