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參數資料
| 型號： | ICM105B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Color VGA CMOS Image Sensor |
| 中文描述： | 色VGA CMOS圖像傳感器 |
| 文件頁數： | 4/17頁 |
| 文件大小： | 1202K |
| 代理商： | ICM105B |
ICM105B VGA CMOS sensor
Data Sheet V1.6, August 2002
2000, 2001,2002 IC Media Corporation & IC Media Technology Corp
web site:
http://www.ic-media.com/
web site:
http://www.ic-media.com.tw/
page
4
10/16/2002
Confidential
1. Pin Assignment
Pin #
14
11
12
13
34
36
32
33
Name
CLKSEL
CLKIN
XIN
XOUT
PCLK
OEN
SIFCID
SIFCMS
Class*
D, I, N
D, I, N
A, I
A, O
D, O
D, I, N
D, I, N
D, I, U
Function
Clock source selection. 0: internal oscillator, 1: CLKIN
External clock source
Oscillator in
Oscillator out
Pixel clock output
Output enable. 0: enable, 1: disable
Lsb of SIF slave address
SIF master/slave selection. 0: slave, 1: master (auto load
from EEPROM after reset)
SIF clock
SIF data
Power down control, 0: power down, 1: active
Resistor to ground = 47 K
@ 24 MHz main clock, 51
K
@ 24 MHz
Chip reset, active low
Data output bit 7
Data output bit 6; if pulled up/down, the initial value of
TIMING_CONTROL_LOW[2] (VSYNC polarity) is 1/0
Data output bit 5; if pulled up/down, the initial value of
TIMING_CONTROL_LOW[1] (HSYNC polarity) is 1/0
Data output bit 4; if pulled up/down, the initial value of
AD_IDL[3] (Sub ID) is 1/0
Data output bit 3; if pulled up/down, the initial value of
AD_IDL[2] (Sub ID) is 1/0
Data output bit 2; if pulled up/down, the initial value of
AD_IDL[1] (Sub ID) is 1/0
Data output bit 1; if pulled up/down, the initial value of
AD_IDL[0] (Sub ID) is 1/0
Data output bit 0; if pulled up/down, the synchronization
mode is in master/slave mode which requires HSYNC
and VSYNC operating in output/input mode
Horizontal sync signal
Vertical sync signal
Flash light control
Analog ramp output
Sensor analog power
Sensor analog ground
Sensor digital power
Sensor digital ground
Digital power
Digital ground
Pad power
Pad ground
Substrate ground
2
1
10
16
SCL
SDA
POWERDN
RSET
D, I/O
D, I/O
D, I, U
A, I
8
48
47
RSTN
DOUT[7]
DOUT[6]
D, I, U
D, O
D, I/O
46
DOUT[5]
D, I/O
44
DOUT[4]
D, I/O
41
DOUT[3]
D, I/O
39
DOUT[2]
D, I/O
38
DOUT[1]
D, I/O
37
DOUT[0]
D, I/O
3
5
35
15
7, 31
9, 30
19
17
4, 43
6, 45
40
42
18
Class Code: A – Analog signal, D – Digital signal, I – Input, O – Output, P – Power or ground, U – Internal
pull-up, N – Internal pull-down
HSYNC
VSYNC
FLASH
RAMP
VDDA
GNDA
VDDD
GNDD
VDDK
GNDK
VDDO
GNDO
GNDS
D, I/O
D, I/O
D, O
A, O
P
P
P
P
P
P
P
P
P
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