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IC M200E
2 Megapixel (UXGA) Digital Color CMOS Image Sensor
Preliminary Data Sheet V1.1
List of Figures
Figure 1. Sensor Block Diagram ...............................................................................................................................7
Figure 2. Cellular Telephone Camera Module COB Application Circuit .................................................................7
Figure 3. Bare Die Pad ..............................................................................................................................................8
Figure 4. 48-Pin CLCC14.22 Package ....................................................................................................................10
Figure 5. Image Sensor Array..................................................................................................................................12
Figure 7. Fast Global Reset.....................................................................................................................................13
Figure 8. Reset Timing............................................................................................................................................26
Figure 9. Pixel Output Timing.................................................................................................................................26
Figure 10. Default UXGA Line Timing for 1800 PCLKs.......................................................................................27
Figure 11. Default UXGA Frame Timing - Set Registers 0x4/0x15 to 0x0010 (H)................................................27
Figure 12. Default SVGA Line Timing for 900 PCLKs..........................................................................................28
Figure 13. Default SVGA Frame Timing – Set Registers 0x14/0x15 to 0x0010 (H)..............................................28
Figure 14. Default QSVGA Line Timing for 450 PCLKs.......................................................................................29
Figure 14. Default QSVGA Frame Timing - Set Registers 0x14/0x15 to 0x0010 (H)............................................29
Figure 15. 48-Pin CLCC14.22 Mechanical Drawing..............................................................................................31
C opyright 2004, IC Media C orporation
http://www.ic-media.com/
9/22/2004
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