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參數(shù)資料
| 型號(hào)： | ICM7541M |
| 廠商： | IC MICROSYSTEMS SDN BHD |
| 元件分類(lèi)： | DAC |
| 英文描述： | 12/10/8-Bit Low Power Single DAC With Serial Interface and Voltage Output |
| 中文描述： | SERIAL INPUT LOADING, 8 us SETTLING TIME, 10-BIT DAC, PDSO8 |
| 封裝： | MSOP-8 |
| 文件頁(yè)數(shù)： | 7/9頁(yè) |
| 文件大?。?/td> | 191K |
| 代理商： | ICM7541M |
ICM7561/7541/7521
Power-Down Mode
The DACs have three Software-Selectable Power-Down
Output Impedances (1 K Ohm, 100 K Ohm and Hi-Z) as
additional safety feature for applications that drive
transducers or valves. The power down (or wake up
command) can be done by loading the control word with
1111 (C3 to C0). In power down mode, the selection of the
output impedance of the DAC is controlled by the last two
bits (D0 and D1 for the ICM7561, or A0 and A1 for the
ICM7541/7521). See Table 1 and Table 2 for details of
operation of this function.
Power-On Reset
There is a power-on reset on board that will clear the
contents of all the latches to all 0s on power-up and the
DAC voltage output will go to ground.
APPLICATIONS INFORMATION
Power Supply Bypassing and Layout Considerations
As in any precision circuit, careful consideration has to be
given to layout of the supply and ground. The return path
from the GND to the supply ground should be short with
low impedance. Using a ground plane would be ideal. The
supply should have some bypassing on it. A 10 μF
tantalum capacitor in parallel with a 0.1 μF ceramic with a
low ESR can be used. Ideally these would be placed as
close as possible to the device. Avoid crossing digital and
analog signals, specially the reference, or running them
close to each other.
Output Swing Limitations
The ideal rail-to-rail DAC would swing from GND to V
DD
.
However, offset and gain error limit this ability. Figure 4
illustrates how a negative offset error will affect the output.
The output will limit close to ground since this is single
supply part, resulting in a dead-band area. As a larger
input is loaded into the DAC the output will eventually rise
above ground. This is why the linearity is specified for a
starting code greater than zero.
Figure 5 illustrates how a gain error or positive offset error
will affect the output when it is close to V
DD
. A positive gain
error or positive offset will cause the output to be limited to
the positive supply voltage resulting in a dead-band of
codes close to full-scale.
Rev. A6 ICmic reserves the right to change specifications without prior notice
7
DEADBAND
NEGATIVE
OFFSET
Figure 4.
Effect of Negative Offset
DEADBAND
POSITIVE
OFFSET
OFFSET AND
GAIN ERROR
V
DD
Figure 5.
Effect of Gain Error and Positive Offset
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICM7541MG | 制造商:ICMIC 制造商全稱(chēng):IC MICROSYSTEMS 功能描述:12/10/8-Bit Low Power Single DAC With Serial Interface and Voltage Output |
| ICM7542 | 制造商:ICMIC 制造商全稱(chēng):IC MICROSYSTEMS 功能描述:12/10/8-Bit Low Power Dual DACs With Serial Interface and Voltage Output |
| ICM7542M | 制造商:ICMIC 制造商全稱(chēng):IC MICROSYSTEMS 功能描述:12/10/8-Bit Low Power Dual DACs With Serial Interface and Voltage Output |
| ICM7542MG | 制造商:ICMIC 制造商全稱(chēng):IC MICROSYSTEMS 功能描述:12/10/8-Bit Low Power Dual DACs With Serial Interface and Voltage Output |
| ICM7543 | 制造商:ICMIC 制造商全稱(chēng):IC MICROSYSTEMS 功能描述:12/10/8-Bit Low Power Quad DACs With Serial Interface and Voltage Output |
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