參數(shù)資料
型號(hào): ICM7563MG
廠商: IC MICROSYSTEMS SDN BHD
元件分類: DAC
英文描述: 12/10/8-Bit Low Power Quad DACs With Serial Interface and Voltage Output
中文描述: QUAD, SERIAL INPUT LOADING, 8 us SETTLING TIME, 12-BIT DAC, PDSO10
封裝: ROHS COMPLIANT, MSOP-10
文件頁數(shù): 4/11頁
文件大?。?/td> 205K
代理商: ICM7563MG
ICM7563/7543/7523
DC ELECTRICAL CHARACTERISTICS (continued)
Rev. A7 ICmic reserves the right to change specifications without prior notice
4
(V
DD
=
2.7V to 5.5V, V
OUT
unloaded; all specifications T
MIN
to
T
MAX
unless otherwise noted)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OUTPUT CHARACTERISTICS
Vout
Output Voltage Range
(Note 3)
0
V
DD
V
VO
SC
Short Circuit Current
60
150
mA
Rout
Output Impedance
Power-Down at 1 K Ohm
0.9
1
1.1
K
Power-Down at 100 K Ohm
90
100
110
K
Output Line Regulation
V
DD
=2.7V to 5.5V
-3.0
0.4
3.0
mV/V
LOGIC INPUTS
V
IH
Digital Input High
(Note 2)
2.4
V
V
IL
Digital Input Low
(Note 2)
0.8
V
Digital Input Leakage
5
AC ELECTRICAL CHARACTERISTICS
(V
DD
=
2.7V to 5.5V, V
OUT
unloaded; all specifications T
MIN
to
T
MAX
unless otherwise noted)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
SR
Slew Rate
2
V/μs
Settling Time
Mid-scale Transition Glitch
Energy
8
μs
nV-S
40
Note 1
:
Note 2
: Guaranteed by design; not tested in production
Note 3
:
See Applications Information
TIMING CHARACTERISTICS
Linearity is defined from code 110 to 3990 (ICM7563)
Linearity is defined from code 16 to 1023 (ICM7543)
Linearity is defined from code 4 to 255 (ICM7523)
(V
DD
=
2.7V to 5.5V, all specifications T
MIN
to
T
MAX
unless otherwise noted)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
t
1
SCK Cycle Time
(Note 2)
30
ns
t
2
Data Setup Time
(Note 2)
10
ns
t
3
Data Hold Time
(Note 2)
10
ns
t
4
SCK Falling edge to
CS Falling Edge to SCK RiEdge
Pulse Width
CS
CS Rising
(Note 2)
0
ns
t
5
(Note 2)
15
ns
t
6
(Note 2)
20
ns
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