參數(shù)資料
型號(hào): ICS501DLF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 160 MHz, OTHER CLOCK GENERATOR, UUC
封裝: DIE
文件頁數(shù): 1/4頁
文件大小: 68K
代理商: ICS501DLF
ICS501
LOCO PLL Clock Multiplier
MDS 501 F
1
Revision 111000
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA95126(408) 295-9800tel www.icst.com
Packaged as 8 pin SOIC or die
ICS’ lowest cost PLL clock
Zero ppm multiplication error
Input crystal frequency of 5 - 27 MHz
Input clock frequency of 2 - 50 MHz
Output clock frequencies up to 160 MHz
Extremely low jitter - 25 ps one sigma
Compatible with all popular CPUs
Duty cycle of 45/55 up to 160 MHz
Mask option for 9 selectable frequencies
Operating voltages of 3.0 to 5.5V
Tri-state output for board level testing
25mA drive capability at TTL levels
Ideal for oscillator replacement
Industrial temperature version available
Advanced, low power CMOS process
The ICS501 LOCO is the most cost effective
way to generate a high quality, high frequency
clock output from a lower frequency crystal or
clock input. The name LOCO stands for LOw
Cost Oscillator, as it is designed to replace crystal
oscillators in most electronic systems. Using Phase-
Locked-Loop (PLL) techniques, the device uses a
standard fundamental mode, inexpensive crystal
to produce output clocks up to 160 MHz.
Stored in the chip’s ROM is the ability to generate
9 different multiplication factors, allowing one
chip to output many common frequencies (see
page 2).
The device also has an Output Enable pin that tri-
states the clock output when the OE pin is taken
low.
Block Diagram
Description
Features
Crystal or
clock input
Crystal
Oscillator
VDD GND
PLL
Clock Multiplier
Circuitry
and
ROM
Output
Buffer
CLK
X1/ICLK
X2
Optional crystal capacitors
S1
S0
Output Enable
相關(guān)PDF資料
PDF描述
ICS501MILFT 140 MHz, OTHER CLOCK GENERATOR, PDSO8
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ICS501MLF 160 MHz, OTHER CLOCK GENERATOR, PDSO8
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ICS501MI 140 MHz, OTHER CLOCK GENERATOR, PDSO8
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ICS501-DPK 制造商:ICS 制造商全稱:ICS 功能描述:LOCO PLL CLOCK MULTIPLIER
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