參數(shù)資料
型號: ICS525-02RILF
元件分類: 時鐘產(chǎn)生/分配
英文描述: 140 MHz, OTHER CLOCK GENERATOR, PDSO28
封裝: 0.150 INCH, SSOP-28
文件頁數(shù): 5/8頁
文件大?。?/td> 76K
代理商: ICS525-02RILF
ICS525-01/02
OSCaR User Configurable Clock
MDS525G
5
Revision10209
Printed 11/12/99
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126(408) 295-9800tel www.icst.com
The dividers are expressed as integers, so that if a 66.66 MHz output is desired from a 14.31818 input, the
Reference Divider Word (RDW) should be 59, and the VCO Divider Word (VDW) should be 276, with
an Output divider (OD) of 2. In this example, R6:R0 is 0111011, V8:V0 is 100010100, and S2:S0 is 001.
Since all of these inputs have pull-up resistors, it is only necessary to ground the zero pins, namely V7, V6,
V5, V3, V1, V0, R6, R2, S2, and S1.
To determine the best combination of VCO, reference, and output divider, use the ICS525 Calculator on
our Web site: http://www.icst.com/wwwcad/ics525inputForm.html. This online form is easy to use and
quickly shows you up to three options for these settings.
You may also fax this page to MicroClock/ICS at 408 295 9818(fax), or send an e-mail to
sales@microclock.com. Be sure to indicate the following:
Your Name ________________ Company Name___________________ Telephone_________________
Respond by e-mail (list your e-mail address) __________________or fax number ___________________
Desired input crystal/clock (in MHz) _______________ Desired output frequency________________
VDD = 3.3V or 5V ___________
Duty Cycle: 40-60% _______ or 45-55% required________
相關(guān)PDF資料
PDF描述
ICS525-02RT 160 MHz, OTHER CLOCK GENERATOR, PDSO28
ICS525-02RILF 140 MHz, OTHER CLOCK GENERATOR, PDSO28
ICS525R-02ILF 250 MHz, OTHER CLOCK GENERATOR, PDSO28
ICS525R-02LFT 250 MHz, OTHER CLOCK GENERATOR, PDSO28
ICS525R-04ILF 195 MHz, OTHER CLOCK GENERATOR, PDSO28
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