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參數(shù)資料
| 型號： | ICS525R-02LFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | 250 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| 封裝： | 0.150 INCH, ROHS COMPLIANT, MO-153, SSOP-28 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大小： | 182K |
| 代理商： | ICS525R-02LFT |
OSCaRTM User Configurable Clock
MDS 525-01/02 Q
5
Revision 092209
Integrated Circuit Systems, Inc.
● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS525-01/02
External Components/Crystal
Selection
Decoupling Capacitors
The ICS525-01/02 requries two 0.01F decoupling
capacitors to be connected between VDD and GND,
one on each side of the chip. The capacitor must be
connected close to the device to minimize lead
inductance. No external power supply filtering is
required for this device.
External Resistors
A 33
series terminating resistor can be used next to
the CLK and REF pins.
Crystal Load Capacitors
The approximate total on-chip capacitance for a crystal
is 16 pF, so a parallel resonant, fundamental mode
crystal with this value of load (correlation) capacitance
should be used. For crystals with a specified load
capacitance greater than 16 pF, crystal capacitors may
be connected from each of the pins X1 and X2 to
Ground as shown in the block diagram. The value (in
pF) of these crystal caps should be (CL -16)*2, where
CL is the crystal load capacitance in pF. These external
capacitors are only required for applications where the
exact frequency is critical. For a clock input, connect to
X1 and leave X2 unconnected (no capacitors on
either).
Determining the Output Frequency
Users have full control in setting the desired output
frequency over the range shown in the table on page 2.
To replace a standard oscillator, users should connect
the divider select input pins directly to ground (or VDD,
although this is not required because of internal
pull-ups) during Printed Circuit Board layout. The
ICS525-01/02 will automatically produce the correct
clock when all components are soldered. It is also
possible to connect the inputs to parallel I/O ports to
switch frequencies. By choosing divides carefully, the
number of inputs which need to be changed can be
minimized. Observe the restrictions on allowed values
of VDW and RDW.
ICS525-01 Settings
The output of the ICS525-01 can be determined by the
following simple equation:
Where:
Reference Divider Word (RDW) = 1 to 127 (0 not
permitted)
VCO Divider Word (VDW) = 4 to 511 (0, 1, 2, 3 not
permitted)
Output Divider (OD) = values on page 3
Also, the following operating ranges should be
observed:
See table on page 3 for full details of maximum
output.
ICS525-02 Settings
The output of the ICS525-02 can be determined by the
following simple equation:
Where:
Reference Divider Word (RDW) = 0 to 127
VCO Divider Word (VDW) = 0 to 511
Output Divider (OD) = values on page 3
Also, the following operating ranges should be
observed:
See table on page 3 for full details of maximum
output.
CLK Frequency
Input Frequency
2x
VDW 8
+
()
RDW 2
+
() OD
---------------------------------------------
×
=
30M Input Frequencyx2x VDW 8
+
()
RDW 2
+
()
-------------------------------200M 3.3V
()or320M 5v )
(
<<
200kHz InputFrequency
RDW 2
+
()
-----------------------------------------------
<
CLK Frequency
Input Frequency
2x
VDW 8
+
()
RDW 2
+
() OD
---------------------------------------------
×
=
30M Input Frequencyx2x VDW 8
+
()
RDW 2
+
()
------------------------------- 240M 3.3V
()or400M 5v )
(
<<
200kHz InputFrequency
RDW 2
+
()
-----------------------------------------------
<
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS525R-02T | 功能描述:IC CLOCK USER CONFIGURE 28-SSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:OSCaR™ 產品變化通告:Product Discontinuation 04/May/2011 標準包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ICS525R-03I | 功能描述:IC CLK PECL INP USER CONF 28SSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:OSCaR™ 產品變化通告:Product Discontinuation 04/May/2011 標準包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ICS525R-03ILF | 功能描述:IC CLK PECL INP USER CONF 28SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:OSCaR™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS525R-03ILFT | 功能描述:IC CLOCK USER CONFIG 28-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:OSCaR™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS525R-03IT | 功能描述:IC CLK PECL INP USER CONF 28SSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:OSCaR™ 產品變化通告:Product Discontinuation 04/May/2011 標準包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
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