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參數(shù)資料
| 型號(hào)： | IDT5T940 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | PRECISION CLOCK GENERATOR OC-192 APPLICATIONS |
| 中文描述： | 精密時(shí)鐘發(fā)生器的OC - 192應(yīng)用 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 68K |
| 代理商： | IDT5T940 |
1
INDUSTRIAL TEMPERATURE RANGE
IDT5T940
PRECISION CLOCK GENERATOR OC-192 APPLICATIONS
DECEMBER 2003
2003 Integrated Device Technology, Inc.
DSC 6195/23
c
IDT5T940
INDUS T RIAL T E MPE RAT URE RANGE
PRECISION CLOCK GENERATOR
OC-192 APPLICATIONS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
Input frequency:
- For SONET non-FEC: 19.44MHz, 38.88MHz, 77.76MHz, 155.52MHz,
311.04MHz, or 622.08MHz
- For SONET FEC: 20.83MHz, 41.66MHz, 83.31MHz, 166.63MHz,
333.26MHz, or 666.52MHz
- For 10GE copper: 19.53MHz, 39.06MHz, 78.125MHz, 156.25MHz,
312.5MHz, or 625MHz
- For 10GE optical: 20.14MHz, 40.28MHz, 80.56MHz, 161.13MHz,
322.26MHz, or 644.53MHz
3-level inputs for feedback divide ratio and output frequency range
selection
1x, 2x, 4x, 8x, 16x, and 32x outputs on Q
OUT
Regenerated input clock or Q
OUT
/4 on Q
REG
Lock indicator
Power-down mode
LVPECL or LVDS outputs
Three modes of output frequency range
- Mode 0: Q
OUT
range 155.5 - 166.6MHz. Q
REG
is a regenerated version
of the input clock.
- Mode 1: Q
OUT
range 622 - 666.5MHz. Q
REG
output 155.5-166.6MHz.
- Mode 2: Q
OUT
range 622 - 666.5MHz. Q
REG
is a regenerated version
of the input clock frequency.
Selectable loop bandwidths
Hitless switchover
Differential LVPECL, LVDS, or single-ended LVTTL input interface
2.375 - 3.465V core and I/O
Available in VFQFPN package
DESCRIPTION:
The IDT5T940 generates a high precision FEC (Forward Error Cor-
rection) or non-FEC source clock for SONET/SDH systems as well as a
source clock for Gigabit Ethernet systems. This device also has clock
regeneration capability: it creates a "clean" version of the clock input by
using the internal oscillator to square the input clock's rising and falling
edges and remove jitter. In the event that the main clock input fails, the
device automatically locks to a backup reference clock using a hitless
switchover mechanism
This device detects loss of valid CLKIN and leaves the VCO of the PLL at
the last valid frequency while an alternate input REFIN is selected. If CLKIN
and REFIN are different frequencies, the multiplication factor will be adjusted to
retain the same output frequency.
The IDT5T940 can act as a translator froma differential LVPECL, LVDS, or
single-ended LVTTL input to LVPECL or LVDS outputs. The IDT5T940-10
has LVDS outputs and the IDT5T940-30 has LVPECL outputs.
The three modes of output frequency range are controlled by the SELmode,
which is a 3-level pin. When SELmode is high or low, the Q
OUT
is a multiplied
version of the input clock while Q
REG
is a regenerated version of the input clock.
When SELmode is md, the Q
OUT
is a multiplied version of the input clock while
Q
REG
is Q
OUT
/4.
The IDT5T940 features a selectable loop bandwidth.
APPLICATIONS:
Terabit routers
Gigabit ethernet systems
SONET / SDH systems
Digital cross connects
Optical transceiver modules
FUNCTIONAL BLOCK DIAGRAM
PLL
CONTROL
LOGIC
LOCK,
FREQ.
DETECTOR
CLKIN
REFIN
LOCK
DIV
N
DIV
M
Q
REG
Q
OUT
CLK/
REF
0
SEL
MODE
PD
PLLBW
1
PLLBW
0
INPUT
MUX
CLKIN
REFIN
CLK/
REF
1
Q
REG
Q
OUT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT5T940-10NLI | PRECISION CLOCK GENERATOR OC-192 APPLICATIONS |
| IDT5T940-30NLI | PRECISION CLOCK GENERATOR OC-192 APPLICATIONS |
| IDT70V19L15PF | HIGH-SPEED 3.3V 128K x 9 DUAL-PORT STATIC RAM |
| IDT70V19L | HIGH-SPEED 3.3V 128K x 9 DUAL-PORT STATIC RAM |
| IDT70V19L20PF | HIGH-SPEED 3.3V 128K x 9 DUAL-PORT STATIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT5T940-10NLGI | 功能描述:IC CLK GENERATOR PREC 28-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| IDT5T940-10NLGI8 | 功能描述:IC CLK GENERATOR PREC 28-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| IDT5T940-30NLGI | 功能描述:IC CLK GENERATOR PREC 28-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:時(shí)鐘/頻率發(fā)生器，多路復(fù)用器 PLL:是 主要目的:存儲(chǔ)器，RDRAM 輸入:晶體 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:1:2 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:Digi-Reel® 其它名稱:296-6719-6 |
| IDT5T940-30NLGI8 | 功能描述:IC CLK GENERATOR PREC 28-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| IDT5T9820NLGI | 功能描述:IC CLK DRIVER ZD PLL 68-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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