參數(shù)資料
型號(hào)： IDT723643L12
廠商： 濟(jì)南固锝電子器件有限公司
英文描述： HIGH-SLEW-RATE, SINGLE-SUPPLY OPERATIONAL AMPLIFIERS 14-PDIP 0 to 70
中文描述： 的CMOS總線匹配SyncFIFOTM 256 × 36，512 × 36，1024 × 36
文件頁(yè)數(shù)： 26/28頁(yè)
文件大?。?/td> 286K
代理商： IDT723643L12
26
COMMERCIAL TEMPERATURE RANGE
IDT723623/723633/723643 BUS-MATCHING SyncFIFO
256 x 36, 512 x 36, 1,024 x 36
Figure 18. Timing for Mail2 Register and
MBF2
Flag (IDT Standard and FWFT Modes)
NOTE:
1. If Port B is configured for word size, data can be written to the Mail2 Register using B0-B17 (B18-B35 are don't care inputs). In this first case A0-A17 will have valid data (A18-A35 will
be indetermnate). If Port B is configured for byte size, data can be written to the Mail2 Register using B0-B8 (B9-B35 are don't care inputs). In this second case, A0-A8 will have valid
data (A9-A35 will be indetermnate).
Figure 19. Block Diagram of 256 x 36, 512 x 36, 1,024 x 36 Synchronous FIFO Memory with
Programmable Flags used in Depth Expansion Configuration
NOTES:
1. Mailbox feature is not supported in depth expansion applications. (MBA + MBB tie to GND)
2. Transfer clock should be set either to the Write Port Clock (CLKA) or the Read Port Clock (CLKB), whichever is faster.
3. The amount of time it takes for
EF
/OR of the last FIFO in the chain to go HIGH (i.e. valid data to appear on the last FIFO’s outputs) after a word has been written to the first FIFO
is the sumof the delays for each individual FIFO: (N - 1)*4*transfer clock) + 3*T
RCLK
, where N is the number of FIFOs in the expansion and T
RCLK
is the CLKB period.
4. The amount of time it takes for
FF
/IR of the first FIFO in the chain to go HIGH after a word has been read fromthe last FIFO is the sumof the delays for each individual FIFO:
(N - 1)*3*transfer clock) + 2*T
WCLK
, where N is the number of FIFOs in the expansion and T
WCLK
is the CLKA period.
DATA IN (Dn)
READ CLOCK (CLKB)
CHIP SELECT (
CSB
)
READ ENABLE (ENB)
EMPTY FLAG/
OUTPUT READY (
EF
/OR)
DATA OUT (Qn)
TRANSFER CLOCK
3269 drw20
IDT
723623
723633
723643
V
CC
IDT
723623
723633
723643
WRITE
READ
A
0
-A
35
MBA
CHIP SELECT (
CSA
)
WRITE SELECT (W/
R
A)
WRITE ENABLE (ENA)
ALMOST-FULL FLAG (
AF
)
FULL FLAG/
INPUT READY (
FF
/IR)
WRITE CLOCK (CLKA)
CLKB
EF
/OR
ENB
CSB
B
0
-B
35
W
/RB
MBB
CLKA
ENA
FF
/IR
CSA
MBA
A
0
-A
35
W/
R
A
READ SELECT (
W
/RB)
ALMOST-EMPTY FLAG (
AE
)
B
0
-B
35
MBB
V
CC
n
n
n
Qn
Dn
V
CC
V
CC
3269 drw19
CLKB
ENB
B0-B35
MBB
CSB
W
/RB
CLKA
MBF2
CSA
MBA
ENA
A0-A35
W/
R
A
t
ENH
t
DS
t
DH
t
ENS2
t
ENH
t
DIS
t
EN
t
MDV
t
PMR
FIFO Output Register
W1 (Remains valid in Mail2 Register after read)
t
ENH
t
ENH
t
ENH
t
PMF
t
PMF
W1
t
ENS1
t
ENS1
t
ENS2
t
ENS2
相關(guān)PDF資料
PDF描述
IDT723643L12PF HIGH-SLEW-RATE, SINGLE-SUPPLY OPERATIONAL AMPLIFIERS 14-PDIP 0 to 70
IDT72T51246L5BBI 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits
IDT72T51236 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits
IDT72T51236L5BB 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits
IDT72T51236L5BBI 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824 bits, 1,179,648 bits and 2,359,296 bits
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT723643L12PF 功能描述:IC FIFO SYNC 1024X36 128QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
IDT723643L12PF8 功能描述:IC FIFO SYNC 1024X36 128QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
IDT723643L12PFG 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Bi-Dir 1K x 36 128-Pin TQFP
IDT723643L15PF 功能描述:IC FIFO SYNC 1024X36 128QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
IDT723643L15PF8 功能描述:IC FIFO SYNC 1024X36 128QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
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