參數(shù)資料
型號: IDT74FCT162511CTEB
廠商: Integrated Device Technology, Inc.
英文描述: FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY
中文描述: 快速CMOS 16位注冊/鎖存奇偶收發(fā)器
文件頁數(shù): 4/11頁
文件大?。?/td> 204K
代理商: IDT74FCT162511CTEB
5.11
4
IDT54/74FCT162511AT/CT
FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS
(1)
PIN DESCRIPTION
Pin Names
OEAB
Description
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Latch Enable Input
B-to-A Latch Enable Input
A-to-B Clock Input
B-to-A Clock Input
A-to-B Data Inputs or B-to-A 3-State Outputs
B-to-A Data Inputs or A-to-B 3-State Outputs
Parity Error (Open Drain) on A Outputs
Parity Error (Open Drain) on B Outputs
A-to-B Parity Input, B-to-A Parity Output
B-to-A Parity Input, A-to-B Parity Output
Parity Mode Selection Input
A to B Port Generate or Check Mode Input
OEBA
LEAB
LEBA
CLKAB
CLKBA
Ax
Bx
PERA
PERB
PAx
(1)
PBx
ODD/
EVEN
GEN
/CHK
2916 tbl 03
NOTES:
1. The PAx pin input is internally disabled during parity generation. This
means that when generating parity in the A to B direction there is no need
to add a pull up resistor to guarantee state. The pin will still function
properly as the parity output for the B to A direction.
Symbol
V
TERM(2)
Terminal Voltage with Respect to
GND
V
TERM(3)
Terminal Voltage with Respect to
GND
Description
Max.
Unit
V
–0.5 to +7.0
–0.5 to
V
CC
+0.5
–65 to +150
–60 to +120 mA
V
T
STG
I
OUT
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not
implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. Open drain and all device terminals except FCT162XXXT Output and I/O
terminals.
3. Output and I/O terminals for FCT162XXXT.
Storage Temperature
DC Output Current
°
C
2916 lnk 01
FUNCTION TABLE
(1,4)
Inputs
Outputs
Bx
OEAB
LEAB
X
H
H
L
L
L
L
CLKAB
X
X
X
L
H
Ax
X
L
H
L
H
X
X
H
L
L
L
L
L
L
Z
L
H
L
H
B
(2)
B
(3)
NOTES:
1. A-to-B data flow is shown. B-to-A data flow is similar but uses
OEBA
,
LEBA, and CLKBA.
2. Output level before the indicated steady-state input conditions were
established.
3. Output level before the indicated steady-state input conditions were
established, provided that CLKAB was HIGH before LEAB went LOW.
4. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High Impedance
= LOW-to-HIGH Transition
2916 tbl 02
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