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參數(shù)資料
| 型號： | IDT74FCT162511CTPVB |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY |
| 中文描述： | 快速CMOS 16位注冊/鎖存奇偶收發(fā)器 |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 204K |
| 代理商： | IDT74FCT162511CTPVB |
IDT54/74FCT162511AT/CT
FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY
MILITARY AND COMMERCIAL TEMPERATURE RANGES
5.11
5
NOTE:
1. This parameter is measured at characterization but not tested.
CAPACITANCE
(T
A
= +25
°
C, f = 1.0MHz)
2916 lnk 04
NOTES:
1. Conditions shown are for
GEN
/CHK = H,
OEAB
= L,
OEBA
= H.
2. A-to-B parity checking is shown. B-to-A parity checking is similar but uses
OEBA
= L,
OEAB
= H and errors will be indicated on
PERA
.
3. In parity checking mode the parity bits will be transmitted unchanged along
with the corresponding data regardless of parity errors. (PB
1
= PA
1
).
4. The response shown is for LEAB = H. If LEAB = L then CLKAB will control
as an edge triggered clock.
5. Conditions shown are for the byte A
0
-A
7
and PA
1
. The byte A
8
-A
15
and
PA
2
is similiar.
6. The parity error flag
PERB
is a combined flag for both bytes A
0
-A
7
and A
8
-
A
15
. If a parity error occurs on either byte
PERB
will go low.
PERB
is an
open drain output which must be externally pulled up to achieve a logic
HIGH.
FUNCTION TABLE
(PARITY CHECKING)
(1, 2, 3, 4)
FUNCTION TABLE
(PARITY GENERATION)
(1, 2, 3, 4, 5)
A
0
- A
7
, Total Number
of inputs that are high
2916 tbl 05
2916 tbl 06
NOTES:
1. Conditions shown are for
GEN
/CHK = L,
OEAB
= L,
OEBA
= H.
2. A-to-B parity checking is shown. B-to-A is capable of parity checking while
A-to-B is performing generation. B-to-A will not generate parity.
3. The response shown is for LEAB = H. If LEAB = L then CLKAB will control
as an edge triggered clock.
4. Conditions shown are for the byte A
0
-A
7
. The byte A
8
-A
15
is similiar but
will output the parity on PB
2
.
5. The error flag
PERB
will remain in a high state during parity generation.
Symbol
C
IN
Parameter
(1)
Input
Capacitance
I/O
Capacitance
Open Drain
Capacitance
Conditions
V
IN
= 0V
Typ.
3.5
Max.
6.0
Unit
pF
C
I/O
V
OUT
= 0V
3.5
8.0
pF
C
O
V
OUT
= 0V
3.5
6.0
pF
ODD/
L
EVEN
PB
1
H
1, 3, 5 or 7
1, 3, 5 or 7
0, 2, 4, 6 or 8
0, 2, 4, 6 or 8
H
L
H
L
L
H
A
0
- A
7
and PA
1(5)
, Total Number
of inputs that are high
ODD/
EVEN
L
PERB
1, 3, 5, 7 or 9
L
1, 3, 5, 7 or 9
0, 2, 4, 6 or 8
0, 2, 4, 6 or 8
H
L
H
H
(6)
H
(6)
L
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相關代理商/技術參數(shù) |
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|---|---|
| IDT74FCT162511CTPVG | 功能描述:IC REGISTERD TRCVR 16BIT 56SSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器 系列:74FCT 標準包裝:47 系列:74LVX 邏輯類型:緩沖器/線路驅(qū)動器，非反相 元件數(shù):4 每個元件的位元數(shù):1 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.209"，5.30mm 寬） 供應商設備封裝:14-SOIC 包裝:管件 |
| IDT74FCT162511CTPVG8 | 功能描述:IC REGISTERD TRCVR 16BIT 56SSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器 系列:74FCT 標準包裝:47 系列:74LVX 邏輯類型:緩沖器/線路驅(qū)動器，非反相 元件數(shù):4 每個元件的位元數(shù):1 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.209"，5.30mm 寬） 供應商設備封裝:14-SOIC 包裝:管件 |
| IDT74FCT162543ATPA | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FCT162543ATPV | 制造商:Integrated Device Technology Inc 功能描述:Bus Transceiver, Dual, 8 Bit, 56 Pin, Plastic, SSOP |
| IDT74FCT162543ETPA | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Integrated Device Technology Inc 功能描述: |
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