- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄61089 > IDT7M9522S200M (INTEGRATED DEVICE TECHNOLOGY INC) 64-BIT, 200 MHz, MICROPROCESSOR, XMA196 PDF資料下載
參數(shù)資料
| 型號： | IDT7M9522S200M |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, 200 MHz, MICROPROCESSOR, XMA196 |
| 封裝： | MEZZANINE CONNECTOR-196 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 56K |
| 代理商： | IDT7M9522S200M |
4
1999
Integrated Device Technology, Inc.
DSC-4266/2
IDT
IDT7M9516/18/19/20/21/22/23
PIN DEFINITIONS
Signal Name
Signal Definition
Type
Description
SysAD(63:0)
System (CPU)
I/O
64-bit multiplexed address/data bus. This bus is driven by the C3 during the address
Address/Data Bus
phase (SysCMD(8)=0) of a bus transaction. Valid data is driven by the C3 during the
data phase (SysCMD(8)=1) for writes when ValidOut* is asserted. The C3 receives
data on this bus during the data phase for reads when ValidIn* is sampled low.
SysADP(7:0)
SysAD Parity
I/O
Even parity is generated during the data phase for writes. Even parity is checked during
the data phase for reads if SysCMD(4) is low. Timing and valid sample windows match
SysAD(63:0). SysADP(0) is assosciated with SysAD(7:0), SysADP(1) is associated
withSysAD(15:8).
SysCMD(8:0)
System (CPU)
I/O
This is the 9-bit processor command bus.
command/data
SysCLK(8:0)
System (CPU)
Output
Nine identical clocks for devices residing on the C3 processor bus. All processor
Clocks
transitions/transactions are referenced with respect to these clocks.
SyncOut
Synchronization
Output
The C3 system clock generator synchronization output must be connected to SyncIn
ClockOutput
through an interconnect scheme that matches that used on SysCLK(8:0).
SyncIn
Synchronization
Input
C3 system clock generator synchronization input. This pin must be connected to
Clock Input
SyncOut for the C3 to operate.
RdRdy*
Read Ready
Input
This pin is driven low by the system to indicate that the system is ready to accept a C3 read
request.
WrRdy*
Write Ready
Input
This pin is driven low by the system to indicate that the system is ready to accept a C3
write request.
ValidOut*
Valid Output
Output
This pin is driven low by the C3 to indicate that it is driving a valid address/data on the SysAD,
SysADP and SysCMD busses.
ValidIn*
Valid Input
Input
This pin in driven low by the system to indicate that it is presenting valid address/data on
the SysAD, SysADP and SysCMD busses.
Endian
Config
Endian configuration input.
Input
0=big, 1=little
OutDrv
Output Drive
Config
Output drive strength configuration input.
Input
0=100%, 1=83%
TimerEn*
Timer Enable
Config
CPU internal timer interrupt enable configuration input.
Input
0=enable timer, 1=disable timer
WrType
Write Type
Config
Write Type configuration input.
Input
0=R4X00 compatible, 1=Pipelined
ClockMult(2:0)
Clock Multiplier
Config
000=x2
Input
001=x3
010=x4
011=x5
100-101=reserved
110=SmartClock mode 0 (max CPU core frequency)
111=SmartClock mode 1(max CPU bus frequency)
BlkWr(1:0)
Block Write
Config
Block Write data rate
Input
00=DDDD
01=DxDxDxD
10=DxxDxxDxxD
11=DxxxDxxxDxxxD
RELEASE*
ReleaseInterface
Output
This pin is driven low to signal to the requesting device that the system interface is available.
ExtReq*
External Request
Intput
This pin is driven low to request the use of the system interface.
4266 tbl 01
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT7M9520S150M | 64-BIT, 150 MHz, MICROPROCESSOR, XMA196 |
| IDT7M9520S200M | 64-BIT, 200 MHz, MICROPROCESSOR, XMA196 |
| IDTCSP59920-7SOI | PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| IDTCSP59920-7SO | PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| IDTCSP59920-5SO | PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT7MP4036S25Z | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT80ALVCH16823PA | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V CMOS 18-BIT BUS-INTERFACE FLIPFLOP WITH 3-STATE OUTPUTS AND BUS-HOLD |
| IDT80HCPS1432CHM | 制造商:Integrated Device Technology Inc 功能描述:IC RIO SWITCH GEN2 576FCBGA |
| IDT80HCPS1432CHMI | 制造商:Integrated Device Technology Inc 功能描述:IC RIO SWITCH GEN2 576FCBGA |
| IDT80HCPS1432CRM | 制造商:Integrated Device Technology Inc 功能描述:IC RIO SWITCH GEN2 576FCBGA |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。