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參數(shù)資料
| 型號(hào)： | IDTCV110L |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
| 中文描述： | 可編程FLEXPC時(shí)鐘P4處理器 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大小： | 100K |
| 代理商： | IDTCV110L |
COMMERCIAL TEMPERATURE RANGE
10
IDTCV110L
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
IDT CONFIDE NT IAL
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
IH
Input HIGH Voltage
3.3V ± 5%
2
—
V
DD
+ 0.3
V
V
IL
Input LOW Voltage
3.3V ± 5%
V
SS
- 0.3
—
0.8
V
V
IH
_FS
LOW Voltage, HIGH Threshold
For FSA.B.C test_mode
0.7
—
V
DD
+ 0.3
V
V
IL
_FS
LOW Voltage, LOW Threshold
For FSA.B.C test_mode
V
SS
- 0.3
—
0.35
V
I
IL
Input LeakageCurrent
0< V
IN
< V
DD
, no internal pull-up or pull-down
–5
—
+5
mA
I
DD3.3OP
I
DD3.3PD
Operating Supply Current
Powerdown Current
Full active, C
L
= full load
All differential pairs driven
All differential pairs tri-stated
—
—
—
—
—
—
400
70
12
mA
mA
F
I
Input Frequency
(1)
Pin Inductance
(2)
V
DD
= 3.3V
—
14.31818
—
MHz
L
PIN
—
—
7
nH
C
IN
Logic inputs
—
—
5
C
OUT
Input Capacitance
(2)
Output pin capacitance
—
—
6
pF
C
INX
X1 and X2 pins
—
—
5
T
STAB
Clock Stabilization
(2,3)
Modulation Frequency
(2)
T
DRIVE
_PD
(2)
T
FALL
_PD
(2)
T
RISE
_PD
(3)
FromV
DD
power-up or de-assertion of PD to first clock
—
—
1.8
ms
Triangular modulation
30
—
33
KHz
CPU output enable after PD de-assertion
—
—
300
us
Fall time of PD
—
—
5
ns
Rise time of PD
—
—
5
ns
ELECT RICAL CHARACT ERIS T ICS - INPUT / S UPPLY / COMMON OUT PUT
PARAMETERS
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
A
= 0°C to +70°C, Supply Voltage: V
DD
= 3.3V ± 5%
NOTES:
1. Input frequency should be measured at the REF output pin and tuned to ideal 14.31818MHz to meet ppmfrequency accuracy on PLL outputs.
2. This parameter is guaranteed by design, but not 100% production tested.
3. See TIMING DIAGRAMS for timng requirements.
Bits
111
011
001
000
Strength
0.6x
0.8x
1x
1.2x
APPLICATION NOTE
NOTE:
1. Write byte 9 prior to Bytes 27, 28, 30, and 31.
Byte 18, bit[2:0] controls PCIF[2:0] strength.
Byte 26, bit[2:0] controls PCI[5:0] strength.
Byte 27, Byte 28 controls the magnitude of the SRC spread.
(1)
Byte 30, Byte 31 sets the center of the frequency of the SRC.
(1)
Byte 23, bit[3:0] controls the CPU PLL spread.
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| IDTCV110LPV | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
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| IDTCV110NPAG | 功能描述:IC FLEXPC CLK PROGR P4 56-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:FlexPC™ 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| IDTCV110NPAG8 | 功能描述:IC FLEXPC CLK PROGR P4 56-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:FlexPC™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| IDTCV110NPVG | 功能描述:IC FLEXPC CLK PROGR P4 56-SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:FlexPC™ 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
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