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參數(shù)資料
| 型號(hào)： | IH6201CJE |
| 廠商： | INTERSIL CORP |
| 元件分類(lèi)： | 通用總線功能 |
| 英文描述： | Dual CMOS Driver/Voltage Translator |
| 中文描述： | DUAL 1-INPUT AND GATE, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁(yè)數(shù)： | 3/4頁(yè) |
| 文件大小： | 54K |
| 代理商： | IH6201CJE |
4-3
Schematic Diagram
Applications
Input Drive Capability
The strobe input lines are designed to be driven from TTL
logic levels; this means 0.8V to 2.4V levels max. and min.
respectively. For those users who require 0.8V to 2.0V
operation, a pull-up resistor is recommended from the TTL
output to +5V line. This resister is not critical and can be in
the 1k
to 10k
range.
When using 4000 series CMOS logic, the input strobe is
connected direct to the 4000 series gate output and no pull
up resistors, or any other interface is necessary.
When the input strobe voltage level goes below GND (i.e. to
-15V) the circuit is unaffected as long as V+ to V
IN
does not
exceed absolute maximum rating.
Output Drive Capability
The translator output is designed to drive the IH401A
Varafets; these are N-channel JFETS with built-in driver
diodes. Driver diodes are necessary to isolate the signal
source from the driver/translator output; this prevents a
forward bias condition between the signal input and the
+V
CC
supply. The IH6201 will drive any JFET provided some
sort of isolation is added.
You will notice in Figure 2 that a “referral” resistor has been
added from 2N4391 gate to its source. This resistor is
needed to compensate for the inadequate charge area curve
for isolation diode i.e. if C vs. V plot for diode
≤
2 [C vs. V plot
for output JFET] switch won’t function; then adding this
resistor overcomes this condition. The “referral” resistor is
normally in the 100k
to 1M
range and is not tool critical.
Making a Complete Solid State Switch that Can Handle
20V
P-P
Signals
The limitation on signal handling capability comes from the
output gating device. When a JFET is used, the pinch-off of
the JFET acting with the V- supply does the limiting. In fact
max. signal handling capability = 2 (V
P
+ (V-)) V
P-P
where V
P
= pinch-off voltage of JFET chosen. i.e. V
P
= 7V, V- = -15V:
max. signal handling = 2(7V + (-15V)) V
P-P
= 2 (7V - 15) V
P-P
= 2(-8V
P-P
) = 16V
P-P
. Obviously to get
≥
20V
P-P
, V
P
≥
5V
with V- = -15V. Another simple way to get 20V
P-P
with V
P
=
7V, is to increase V- to -17V. In fact using V+ = +12V or +15V
and setting V- = -18V allows one to switch 20V
P-P
with the
IH401A. The advantage of using the V
P
= 7V pinch-off (along
with unsymmetrical supplies), over the V
P
= 5V pinch-off (and
FIGURE 1. SCHEMATIC DIAGRAM (ONE CHANNEL)
FIGURE 2.
IH6201
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| IH6201MJE | Dual CMOS Driver/Voltage Translator |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IH6201CJE DIE | 制造商:Harris Corporation 功能描述: |
| IH6201CPE | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| IH6201CPE WAF | 制造商:Harris Corporation 功能描述: |
| IH6201M/D DIE | 制造商:Harris Corporation 功能描述: |
| IH6201MJE | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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