參數(shù)資料
型號(hào)： IKW30N60T
廠商： INFINEON TECHNOLOGIES AG
英文描述： Low Loss DuoPack : IGBT in Trench and Fieldstop technology with soft, fast recovery anti-parallel EmCon HE diode
中文描述： 低損耗DuoPack：在IGBT的溝槽場(chǎng)終止技術(shù)和軟，恢復(fù)快反平行何快恢復(fù)二極管
文件頁數(shù)： 3/13頁
文件大?。?/td> 397K
代理商： IKW30N60T
Switching Characteristic, Inductive Load,
at
T
j
=25
°
C
TrenchStop Series
IKW30N60T
q
Power Semiconductors
3
Rev. 2.1 Dev-04
Value
Typ.
Parameter
Symbol
Conditions
min.
max.
Unit
IGBT Characteristic
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Turn-on energy
Turn-off energy
Total switching energy
Anti-Parallel Diode Characteristic
Diode reverse recovery time
Diode reverse recovery charge
Diode peak reverse recovery current
Diode peak rate of fall of reverse
recovery current during
t
b
Switching Characteristic, Inductive Load,
at
T
j
=175
°
C
t
d(on)
t
r
t
d(off)
t
f
E
on
E
off
E
ts
-
-
-
-
-
-
-
23
21
254
46
0.69
0.77
1.46
-
-
-
-
-
-
-
ns
T
j
=25
°
C,
V
CC
=400V,
I
C
=30A,
V
GE
=0/15V,
R
G
=10.6
,
L
σ
C
σ
Energy losses include
“tail” and diode
reverse recovery.
1)
=136nH,
1)
=39pF
mJ
t
rr
Q
rr
I
rrm
di
rr
/dt
-
-
-
-
143
0.92
16.3
603
-
-
-
-
ns
μC
A
A/
μ
s
T
j
=25
°
C,
V
R
=400V,
I
F
=30A,
di
F
/dt
=910A/
μ
s
Value
Typ.
Parameter
Symbol
Conditions
min.
max.
Unit
IGBT Characteristic
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Turn-on energy
Turn-off energy
Total switching energy
Anti-Parallel Diode Characteristic
Diode reverse recovery time
Diode reverse recovery charge
Diode peak reverse recovery current
Diode peak rate of fall of reverse
recovery current during
t
b
t
d(on)
t
r
t
d(off)
t
f
E
on
E
off
E
ts
-
-
-
-
-
-
-
24
26
292
90
1.0
1.1
2.1
-
-
-
-
-
-
-
ns
T
j
=175
°
C,
V
CC
=400V,
I
C
=30A,
V
GE
=0/15V,
R
G
= 10.6
L
σ
C
σ
Energy losses include
“tail” and diode
reverse recovery.
1)
=136nH,
1)
=39pF
mJ
t
rr
Q
rr
I
rrm
di
rr
/dt
-
-
-
-
225
2.39
22.3
310
-
-
-
-
ns
μC
A
A/
μ
s
T
j
=175
°
C
V
R
=400V,
I
F
=30A,
di
F
/dt
=910A/
μ
s
1)
Leakage inductance
L
σ
and Stray capacity
C
σ
due to dynamic test circuit in Figure E.
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