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參數(shù)資料
| 型號(hào)： | IN74ACT273 |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | OCTAL D FLIP-FLOP WITH COMMON CLOCK AND RESET |
| 中文描述： | 八路D觸發(fā)器與通用時(shí)鐘和復(fù)位次浮點(diǎn)運(yùn)算 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 182K |
| 代理商： | IN74ACT273 |
IN74ACT273
1
O
CTAL
D
F
LIP
-F
LOP WITH
C
OMMON
C
LOCK AND
R
ESET
High-Speed Silicon-Gate CMOS
The IN74ACT273 is identical in pinout to the LS/ALS273,
HC/HCT273. The IN74ACT273 may be used as a level converter
for interfacing TTL or NMOS outputs to High Speed CMOS inputs.
This device consists of eight D flip-flops with common Clock
and Reset inputs. Each flip-flop is loaded with a low-to-high
transition of the Clock input. Reset is asynchronous and active
low.
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
μ
A; 0.1
μ
A @ 25
°
C
Outputs Source/Sink 24 mA
ORDERING INFORMATION
IN74ACT273N Plastic
IN74ACT273DW SOIC
T
A
= -40
°
to 85
°
C for all
packages
FUNCTION TABLE
Inputs
Clock
D
Output
Q
Rese
t
L
H
H
H
X
L
X
H
L
X
L
H
L
no
change
no
change
H
X
X = don’t care
LOGIC DIAGRAM
PIN 20=V
CC
PIN 10 = GND
PIN ASSIGNMENT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IN74ACT273DW | OCTAL D FLIP-FLOP WITH COMMON CLOCK AND RESET |
| IN74ACT273N | OCTAL D FLIP-FLOP WITH COMMON CLOCK AND RESET |
| IN74ACT27 | Triple 3-Input NOR Gate |
| IN74ACT27D | Triple 3-Input NOR Gate |
| IN74ACT27N | Triple 3-Input NOR Gate |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IN74ACT273DW | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:OCTAL D FLIP-FLOP WITH COMMON CLOCK AND RESET |
| IN74ACT273N | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:OCTAL D FLIP-FLOP WITH COMMON CLOCK AND RESET |
| IN74ACT27D | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Triple 3-Input NOR Gate |
| IN74ACT27N | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Triple 3-Input NOR Gate |
| IN74ACT299 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:8-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH PARALLEL I/O |
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