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參數(shù)資料
| 型號(hào)： | IN74ACT273DW |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | OCTAL D FLIP-FLOP WITH COMMON CLOCK AND RESET |
| 中文描述： | 八路D觸發(fā)器與通用時(shí)鐘和復(fù)位次浮點(diǎn)運(yùn)算 |
| 文件頁(yè)數(shù)： | 4/5頁(yè) |
| 文件大?。?/td> | 182K |
| 代理商： | IN74ACT273DW |
IN74ACT273
4
AC ELECTRICAL CHARACTERISTICS
(V
CC
=5.0 V
±
10%, C
L
=50pF,Input t
r
=t
f
=3.0 ns)
Symbol
Parameter
Guaranteed Limits
25
°
C
-40
°
C to
85
°
C
Min
125
2.5
2.5
2.5
4.5
Unit
Min
125
3.0
3.0
3.0
Max
10.0
11.0
11.0
Max
11.0
12.0
11.5
f
max
t
PHL
t
PLH
t
PHL
C
IN
Maximum Clock Frequency (Figure 1)
Propagation Delay, Clock to Q (Figure 1)
Propagation Delay, Clock to Q (Figure 1)
Propagation Delay, Reset to Q (Figure 2)
Maximum Input Capacitance
MHz
ns
ns
ns
pF
4.5
Power Dissipation Capacitance
Typical @25
°
C,V
CC
=5.0 V
50
C
PD
pF
TIMING REQUIREMENTS
(V
CC
=5.0 V
±
10%, C
L
=50pF, Input t
r
=t
f
=3.0 ns)
Symbol
Parameter
Guaranteed Limits
25
°
C
-40
°
C to
85
°
C
5.5
Unit
t
su
Minimum Setup Time, Data to Clock
(Figure 3)
Minimum Hold Time, Data to Clock
(Figure 3)
Minimum Pulse Width, Clock (Figure 1)
Minimum Pulse Width, Reset (Figure 2)
Minimum Recovery Time, Reset to Clock
(Figure 2)
4.5
ns
t
h
2.0
2.0
ns
t
w
t
w
t
rec
4.0
4.0
2.0
4.5
4.5
3.0
ns
ns
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