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參數資料
| 型號： | IN74ACT533N |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | OCTAL 3-STATE INVERTING TRANSPARENT LATCH |
| 中文描述： | 八路三態(tài)反相透明鎖存器 |
| 文件頁數： | 2/5頁 |
| 文件大?。?/td> | 195K |
| 代理商： | IN74ACT533N |
IN74ACT533
2
MAXIMUM RATINGS
*
Symbol
V
CC
DC Supply Voltage (Referenced to GND)
V
IN
DC Input Voltage (Referenced to GND)
V
OUT
DC Output Voltage (Referenced to GND)
I
IN
DC Input Current, per Pin
I
OUT
DC Output Sink/Source Current, per Pin
I
CC
DC Supply Current, V
CC
and GND Pins
P
D
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
Tstg
Storage Temperature
T
L
Lead Temperature, 1 mm from Case for 10
Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/
°
C from 65
°
to 125
°
C
SOIC Package: : - 7 mW/
°
C from 65
°
to 125
°
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
V
CC
DC Supply Voltage (Referenced to GND)
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to
GND)
T
J
Junction Temperature (PDIP)
T
A
Operating Temperature, All Package Types
I
OH
Output Current - High
I
OL
Output Current - Low
t
r
, t
f
Input Rise and Fall Time
(except Schmitt Inputs)
*
V
IN
from 0.8 V to 2.0 V
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, V
IN
and
V
OUT
should be constrained to the range GND
≤
(V
IN
or V
OUT
)
≤
V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
V
CC
). Unused outputs must be left open.
Parameter
Value
-0.5 to +7.0
-0.5 to V
CC
+0.5
-0.5 to V
CC
+0.5
±
20
±
50
±
50
750
500
-65 to +150
260
Unit
V
V
V
mA
mA
mA
mW
°
C
°
C
Min
4.5
0
Max
5.5
V
CC
Unit
V
V
140
+85
-24
24
10
8.0
°
C
°
C
mA
mA
ns/V
-40
0
0
*
V
CC
V
CC
=5.5 V
=4.5
V
相關PDF資料 |
PDF描述 |
|---|---|
| IN74ACT534 | OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| IN74ACT534DW | OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| IN74ACT534N | OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| IN74HC00A | Quad 2-Input NAND Gate High-Performance Silicon-Gate CMOS |
| IN74HC00AD | Quad 2-Input NAND Gate High-Performance Silicon-Gate CMOS |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IN74ACT534 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| IN74ACT534DW | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| IN74ACT534N | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| IN74ACT573 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:OCTAL 3-STATE NONINVERTING TRANSPARENT LATCH |
| IN74ACT573DW | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:OCTAL 3-STATE NONINVERTING TRANSPARENT LATCH |
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