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參數(shù)資料
| 型號： | IN74HC652 |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| 中文描述： | 八路三態(tài)總線收發(fā)器和D觸發(fā)器 |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 297K |
| 代理商： | IN74HC652 |
IN74HC652
5
TIMING REQUIREMENTS
(Input t
r
=t
f
=6.0 ns)
Symbol
Parameter
V
CC
V
Guaranteed Limit
25
°
C to-
55
°
C
50
10
9
≤
85
°
C
≤
125
°
C
Unit
t
su
Minimum Setup Time, Input A
to
A-to-B Clock (or Input B to B-
to-A Clock) (Figure 7)
Minimum Hold Time, A-to-B
Clock to Input A (or B-to-A
Clock
Input B) (Figure 7)
Minimum Pulse Width, A-to-B
Clock
(or
B-to-A
(Figure 7)
Maximum Input Rise and Fall
Times (Figures 2 and 3)
2.0
4.5
6.0
65
13
11
75
15
13
ns
t
h
to
2.0
4.5
6.0
25
5
5
30
6
5
40
8
7
ns
t
w
Clock)
2.0
4.5
6.0
2.0
4.5
6.0
75
15
13
1000
500
400
95
19
16
1000
500
400
110
22
19
1000
500
400
ns
t
r
, t
f
ns
TIMING DIAGRAM
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IN74HC74 | Dual D Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS |
| IN74HC74AD | Replaced by SN74ABT541B : Octal Buffers/Drivers With 3-State Outputs 20-SOIC -40 to 85 |
| IN74HC75A | Octal Buffers/Drivers With 3-State Outputs 20-TSSOP -40 to 85 |
| IN74HC75AD | Octal Buffers/Drivers With 3-State Outputs 20-TSSOP -40 to 85 |
| IN74HC75AN | Octal Buffers/Drivers With 3-State Outputs 20-TSSOP -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IN74HC652A | 制造商:IKSEMICON 制造商全稱:IK Semicon Co., Ltd 功能描述:Octal 3-State Bus Transceivers and D Flip-Flops High-Performance Silicon-Gate CMOS |
| IN74HC74 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Dual D Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS |
| IN74HC74A | 制造商:IKSEMICON 制造商全稱:IK Semicon Co., Ltd 功能描述:Dual D Flip-Flop with Set and Reset |
| IN74HC74AD | 制造商:IKSEMICON 制造商全稱:IK Semicon Co., Ltd 功能描述:Dual D Flip-Flop with Set and Reset |
| IN74HC74AN | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Dual D Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS |
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