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參數(shù)資料
| 型號： | IN74HCT109 |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | DUAL J-K FLIP-FLOP WITH SET AND RESET |
| 中文描述： | 雙JK觸發(fā)器與SET和RESET |
| 文件頁數(shù)： | 4/5頁 |
| 文件大小： | 144K |
| 代理商： | IN74HCT109 |
IN74HCT109
4
AC ELECTRICAL CHARACTERISTICS
(V
CC
=5.5 V
±
10%, C
L
=50pF,Input t
r
=t
f
=6.0 ns)
Symbol
Parameter
Guaranteed Limit
25
°
C
to
-55
°
C
30
24
≤
85
°
C
≤
125
°
C
Unit
f
max
Maximum Clock Frequency (50% Duty
Cycle) (Figures 1 and 4)
Maximum Propagation Delay, Clock to Q
or
Q
(Figures 1 and 4)
Maximum Propagation Delay , Set or
Reset to Q or
Q
(Figures 2 and 4)
t
TLH
, t
THL
Maximum Output Transition Time, Any
Output (Figures 1 and 4)
C
IN
Maximum Input Capacitance
20
MHz
t
PLH
,
t
PHL
t
PHL
35
44
53
ns
46
58
69
ns
15
19
22
ns
10
10
10
pF
Power Dissipation Capacitance (Per Flip-
Flop)
Used to determine the no-load dynamic
power
P
D
=C
PD
V
CC
Typical @25
°
C,V
CC
=5.0
V
60
C
PD
consumption:
2
f+I
CC
V
CC
+
I
CC
V
CC
pF
TIMING REQUIREMENTS
(V
CC
=5.5 V
±
10%, C
L
=50pF,Input t
r
=t
f
=6.0 ns)
Symbol
Parameter
Guaranteed Limit
25
°
C to
-55
°
C
20
≤
85
°
C
≤
125
°
C
Unit
t
SU
Minimum Setup Time, J
or K to Clock (Figure 3)
Minimum
Hold
Clock to J or K (Figure 3)
Minimum
Time,
Set
Inactive to Clock (Figure
2)
Minimum Pulse Width,
Set or Reset (Figure 2)
Minimum
Width,Clock (Figure 1)
Maximum Input Rise and
Fall Times (Figure 1)
25
30
ns
t
h
Time,
5
5
5
ns
t
rec
Recovery
or
Reset
5
5
5
ns
t
w
16
20
24
ns
t
w
Pulse
16
20
24
ns
t
r,
t
f
500
500
500
ns
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PDF描述 |
|---|---|
| IN74HCT10A | Triple 3-Input NAND Gate |
| IN74HCT10AD | Triple 3-Input NAND Gate |
| IN74HCT10AN | Octal Registered Transceivers With 3-State Outputs 24-SSOP -40 to 85 |
| IN74HCT125A | Octal Registered Transceivers With 3-State Outputs 24-SSOP -40 to 85 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IN74HCT109A | 制造商:IKSEMICON 制造商全稱:IK Semicon Co., Ltd 功能描述:Dual J-K Flip-Flop with set and Reset High-Performance Silicon-Gate CMOS |
| IN74HCT109AD | 制造商:IKSEMICON 制造商全稱:IK Semicon Co., Ltd 功能描述:Dual J-K Flip-Flop with set and Reset High-Performance Silicon-Gate CMOS |
| IN74HCT109AN | 制造商:IKSEMICON 制造商全稱:IK Semicon Co., Ltd 功能描述:Dual J-K Flip-Flop with set and Reset High-Performance Silicon-Gate CMOS |
| IN74HCT10A | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Triple 3-Input NAND Gate |
| IN74HCT10AD | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Triple 3-Input NAND Gate |
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