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參數(shù)資料
| 型號： | IRS21366 |
| 廠商： | International Rectifier |
| 英文描述： | 3-PHASE BRIDGE DRIVER |
| 中文描述： | 3相橋式驅(qū)動器 |
| 文件頁數(shù)： | 2/23頁 |
| 文件大小： | 614K |
| 代理商： | IRS21366 |
www.irf.com
2
IRS213(6,62,63,65,66,67,68) (J&S)PbF
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Symbol
Definition
Recommended Operating Conditions
The input/output logic-timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute referenced to COM. The
V
S
& V
SS
offset ratings are tested
with all supplies biased at a 15 V differential.
Symbol
Definition
Min.
Max.
Units
IRS213(6,68)
IRS21362
IRS213(6,63,65,66,67)
V
S1,2,3
+10
V
S1,2,3
+11.5
V
S1,2,3
+12
Note 1
V
S1,2,3
+ 20
V
S1,2,3
+ 20
V
S1,2,3
+ 20
600
V
B1,2,3
High side floating supply voltage
V
S1,2,3
High side floating supply voltage
IRS213(6,68)
IRS21362
IRS213(6,63,65,66,67)
10
11.5
12
V
S1,2,3
0
-5
V
SS
V
SS
20
20
20
V
CC
Low side supply voltage
V
HO1,2,3
V
LO1,2,3
V
SS
V
FLT
V
RCIN
High side output voltage
Low side output voltage
Logic ground
FAULT output voltage
V
B1,2,3
V
CC
5
V
CC
V
CC
RCIN input voltage
V
Note 1:
Logic operational for V
S
of (COM - 8 V) to (COM + 600 V). Logic state held for V
S
of (COM - 8 V) to (COM –V
BS
).
(Please refer to the Design Tip DT97-3 for more details).
Min.
Max.
Units
V
S
High side offset voltage
V
B 1,2,3
- 20
V
B 1,2,3
+ 0.3
V
B
High side floating supply voltage
High side floating output voltage
Low side and logic fixed supply voltage
Logic ground
Low side output voltage
Input voltage LIN, HIN, ITRIP, EN, RCIN
FAULT output voltage
Allowable offset voltage slew rate
-0.3
620
V
HO1,2,3
V
CC
V
SS
V
LO1,2,3
V
IN
V
FLT
dV/dt
V
S1,2,3
- 0.3 V
B 1,2,3
+ 0.3
-0.3
V
CC
- 20
-0.3
V
SS
-0.3
V
SS
-0.3
—
—
—
—
—
—
—
—
-55
—
20
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
50
1.5
1.6
2.0
83
78
63
150
150
300
V
V/ns
(28 lead PDIP)
(28 lead SOIC)
(44 lead PLCC)
(28 lead PDIP)
(28 lead SOIC)
(44 lead PLCC)
P
D
Package power dissipation
@ T
A
≤
+25 °C
W
Rth
JA
Thermal resistance, junction to
ambient
°C/W
T
J
T
S
T
L
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
°C
PRELIMINARY
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