- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384523 > ISL59533 (Intersil Corporation) 32x32 Video Crosspoint with Differential Inputs PDF資料下載
參數(shù)資料
| 型號： | ISL59533 |
| 廠商： | Intersil Corporation |
| 英文描述： | 32x32 Video Crosspoint with Differential Inputs |
| 中文描述： | 32x32視頻交叉點的差分輸入 |
| 文件頁數(shù)： | 19/24頁 |
| 文件大?。?/td> | 1229K |
| 代理商： | ISL59533 |
19
FN6222.0
March 13, 2006
Block Diagram
General Description
The ISL59533 is a 32x32 integrated video crosspoint switch
matrix with differential input and output buffers and On-
Screen Display (OSD) insertion. This device operates from a
single +5V supply. Any output can be switched to any of the
32 input video signal sources and OSD information through
an internal, dedicated fast 2:1 mux located before the output
buffer. Also, any one input can be broadcast to all 32
outputs.
Each output X is defined as:
Voutx = Avx*(INx-INBx+REF)
Where Avx = 1, or Avx = 2. Note that all REF’s are common
between channels and must be externally well buffered
and/or bypassed.
The ISL59533 offers a -3dB signal bandwidth of 300MHz.
The differential gain and phase at 0.01% and 0.03°
respectively, along with 0.1dB flatness out to 35MHz. The
switch matrix configuration and output buffer gain are
programmed through an SPI/QSPI-compatible, three-wire
serial interface. The ISL59533 interface is set up to facilitate
both fast updates and initialization. On power-up, all facilities
are initialized in the disabled state to avoid output conflicts
within the user system.
Digital Interface
The ISL59533 uses a simple 3-wire SPI compliant digital
interface to program the outputs. The ISL59533 can support
the clock rate up to 5MHz.
Serial Interface
The ISL59533 is programmed through a three-wire serial
interface. The start and stop conditions are defined by the
ENA signal. While the ENA is low, the data on the SDI (serial
data input) pin is shifted into the 16-bit shift register on the
positive edge of the SCLK (serial clock) signal. The LSB
(bit 0) is loaded first and the MSB (bit 15) is loaded last (see
Table 1). After the full 16-bit data has been loaded, the ENA
is pulled high and the addressed output channel is updated.
The SCLK is disabled internally when the ENA is high. The
SCLK must be low before the ENA is pulled low.
The Serial Timing Diagram and parameters table show the
timing requirements for three-wire signals.
OVERn
VOVERn
OUTPUT
ENABLE
VS+
SDI
CLK
ENA
SDO
POWER-ON
POWER-ON
V
IN
0
V
IN
31
SWITCH
MATRIX
-
+
-
+
SPI INTERFACE, REGISTER
OINPUT
CL32
A
+1, +2
32 INPUTS
32 OUTPUTS
REF
ISL59533
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISL59533IKEZ | 32x32 Video Crosspoint with Differential Inputs |
| ISL59534 | 32x16 Video Crosspoint |
| ISL59534IKEZ | 32x16 Video Crosspoint |
| ISL5961IAZ | 14-Bit, +3.3V, 130/210+MSPS, High Speed D/A Converter |
| ISL5961IBZ | 14-Bit, +3.3V, 130/210+MSPS, High Speed D/A Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL59533IKEZ | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:32x32 Video Crosspoint with Differential Inputs |
| ISL59534 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:32x16 Video Crosspoint |
| ISL59534_0708 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:32x16 Video Crosspoint |
| ISL59534IKEZ | 功能描述:IC CROSSPOINT SW 32X16 356BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 應(yīng)用說明:Ultrasound Imaging Systems Application Note 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- 功能:開關(guān) 電路:單刀單擲 導(dǎo)通狀態(tài)電阻:48 歐姆 電壓電源:單電源 電壓 - 電源，單路/雙路(±):2.7 V ~ 5.5 V 電流 - 電源:5µA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:托盤 |
| ISL5957 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:14-Bit, +3.3V, 260+MSPS, High Speed D/A Converter |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。