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參數(shù)資料
| 型號(hào)： | ISL6269A |
| 廠商： | Intersil Corporation |
| 英文描述： | High-Performance Notebook PWM Controller(高性能筆記本PWM控制器) |
| 中文描述： | 高性能筆記本PWM控制器（高性能筆記本的PWM控制器） |
| 文件頁(yè)數(shù)： | 7/14頁(yè) |
| 文件大?。?/td> | 313K |
| 代理商： | ISL6269A |
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7
FN9253.2
May 30, 2007
LG (Pin 11)
The LG pin is the output of the low-side MOSFET gate
driver. Connect to the gate of the low-side MOSFET.
PVCC (Pin 12)
The PVCC pin is the input voltage bias for the LG low-side
MOSFET gate driver. Connect +5V from the PVCC pin to the
PGND pin. Decouple with at least 1μF of an MLCC capacitor
across the PVCC and PGND pins.
BOOT (Pin 13)
The BOOT pin stores the input voltage for the UG high-side
MOSFET gate driver. Connect an MLCC capacitor across
the BOOT and PHASE pins. The boot capacitor is charged
through an internal boot diode connected from the PVCC pin
to the BOOT pin, each time the PHASE pin drops below
PVCC minus the voltage dropped across the internal boot
diode.
UG (Pin 14)
The UG pin is the output of the high-side MOSFET gate
driver. Connect to the gate of the high-side MOSFET.
PHASE (Pin 15)
The PHASE pin detects the voltage polarity of the PHASE
node and is also the current return path for the UG high-side
MOSFET gate driver. Connect the PHASE pin to the node
consisting of the high-side MOSFET source, the low-side
MOSFET drain, and the output inductor.
PGOOD (Pin 16)
The PGOOD pin is an open-drain output that indicates when
the converter is able to supply regulated voltage. Connect
the PGOOD pin to +5V through a pull-up resistor.
Theory of Operation
Modulator
The ISL6269A is a hybrid of fixed frequency PWM control,
and variable frequency hysteretic control. Intersil’s R
3
technology can simultaneously affect the PWM switching
frequency and PWM duty cycle in response to input voltage
and output load transients. The term “Ripple” in the name
“Robust-Ripple-Regulator” refers to the converter output
inductor ripple current, not the converter output ripple
voltage. The R
3
modulator synthesizes an AC signal V
R
,
which is an ideal representation of the output inductor ripple
current. The duty-cycle of V
R
is the result of charge and
discharge current through a ripple capacitor C
R
. The current
through C
R
is provided by a transconductance amplifier g
m
that measures the VIN and VO pin voltages. The positive
slope of V
R
can be written as:
V
RPOS
The negative slope of V
R
can be written as:
V
RNEG
Where g
m
is the gain of the transconductance amplifier.
A window voltage V
W
is referenced with respect to the error
amplifier output voltage V
COMP
, creating an envelope into
which the ripple voltage V
R
is compared. The amplitude of
V
W
is set by a resistor connected across the FSET and GND
pins. The V
R,
V
COMP,
and V
W
signals feed into a window
comparator in which V
COMP
is the lower threshold voltage
and V
W
is the higher threshold voltage. Figure 3 shows
PWM pulses being generated as V
R
traverses the V
W
and
V
COMP
thresholds . The PWM switching frequency is
proportional to the slew rates of the positive and negative
slopes of V
R;
the PWM switching frequency is inversely
proportional to the voltage between V
W
and V
COMP.
Power-On Reset
The ISL6269A is disabled until the voltage
V
VCC
has
increased above the rising power-on reset (POR)
V
VCC_THR
threshold voltage. The controller will become once again
disabled when the voltage
V
VCC
decreases below the falling
POR
V
VCC_THF
threshold voltage.
EN, Soft-Start, and PGOOD
The ISL6269A uses a digital soft-start circuit to ramp the
output voltage of the converter to the programmed regulation
setpoint at a predictable slew rate. The slew rate of the
soft-start sequence has been selected to limit the inrush
current through the output capacitors as they charge to the
desired regulation voltage. When the EN pin is pulled above
the rising EN threshold voltage V
ENTHR
the PGOOD
Soft-Start Delay t
SS
starts and the output voltage begins to
rise. The output voltage enters regulation in approximately
1.5ms and the PGOOD pin goes to high impedance once t
SS
has elapsed.
g
m
(
)
V
IN
V
OUT
–
(
)
=
(EQ. 1)
g
m
V
OUT
=
(EQ. 2)
Ripple Capacitor Voltage CR
Error Amplifier Voltage VCOMP
Window Voltage VW
PWM
FIGURE 3. MODULATOR WAVEFORMS DURING LOAD
TRANSIENT
ISL6269A
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL6269ACRZ | 功能描述:IC REG CTRLR BUCK PWM 16-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:Robust Ripple Regulator™ (R³) 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:275kHz 占空比:50% 電源電壓:18 V ~ 110 V 降壓:無(wú) 升壓:無(wú) 回掃:無(wú) 反相:無(wú) 倍增器:無(wú) 除法器:無(wú) Cuk:無(wú) 隔離:是 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:帶卷 (TR) |
| ISL6269ACRZ-T | 功能描述:IC REG CTRLR BUCK PWM 16-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:Robust Ripple Regulator™ (R³) 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:275kHz 占空比:50% 電源電壓:18 V ~ 110 V 降壓:無(wú) 升壓:無(wú) 回掃:無(wú) 反相:無(wú) 倍增器:無(wú) 除法器:無(wú) Cuk:無(wú) 隔離:是 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:帶卷 (TR) |
| ISL6269ACRZ-TR5453 | 制造商:Intersil Corporation 功能描述:STD. ISL6269ACRZ-T WITH GOLD BOND WIRE ONLY, T&R - Tape and Reel |
| ISL6269AEVAL2 | 制造商:Intersil Corporation 功能描述:ISL6269A EVALUATION BOARD 2 - Bulk |
| ISL6269AEVAL2Z | 功能描述:EVALUATION BOARD FOR ISL6269A RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估板 - DC/DC 與 AC/DC（離線）SMPS 系列:Robust Ripple Regulator™ (R³) 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:True Shutdown™ 主要目的:DC/DC，步升 輸出及類型:1，非隔離 功率 - 輸出:- 輸出電壓:- 電流 - 輸出:1A 輸入電壓:2.5 V ~ 5.5 V 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):升壓 頻率 - 開(kāi)關(guān):3MHz 板類型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
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