參數(shù)資料
型號(hào)： ISPGDX160VA-9Q208I
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： PLD
英文描述： In-System Programmable 3.3V Generic Digital CrosspointTM
中文描述： EE PLD, 9 ns, PQFP208
封裝： PLASTIC, QFP-208
文件頁數(shù)： 18/37頁
文件大?。?/td> 464K
代理商： ISPGDX160VA-9Q208I
18
Specifications
ispGDX160V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Data Prop. Delay from Any I/O pin to Any I/O pin (4:1 MUX)
Data Prop. Delay from MUXsel Inputs to Any Output (4:1 MUX)
Clock Frequency, Max. Toggle
Clock Frequency with External Feedback
Input Latch or Register Setup Time Before Y
x
Input Latch or Register Setup Time Before I/O Clock
Output Latch or Register Setup Time Before Y
x
Output Latch or Register Setup Time Before I/O Clock
Global Clock Enable Setup Time Before Y
x
Global Clock Enable Setup Time Before I/O Clock
I/O Clock Enable Setup Time Before Y
x
Input Latch or Register Hold Time (Y
x
)
Input Latch or Register Hold Time (I/O Clock)
Output Latch or Register Hold Time (Y
x
)
Output Latch or Register Hold Time (I/O Clock)
Global Clock Enable Hold Time (Y
x
)
Global Clock Enable Hold Time (I/O Clock)
I/O Clock Enable Hold Time (Y
x
)
Output Latch or Register Clock (from Y
x
) to Output Delay
Input Latch or Register Clock (from Y
x
) to Output Delay
Output Latch or Register Clock (from I/O pin) to Output Delay
Input Latch or Register Clock (from I/O pin) to Output Delay
Input to Output Enable
Input to Output Disable
Test OE Output Enable
Test OE Output Disable
Clock Pulse Duration, High
Clock Pulse Duration, Low
Register Reset Delay from RESET Low
Reset Pulse Width
Output Delay Adder for Output Timings Using Slow Slew Rate
Output Skew (tgco1 Across Chip)
1. All timings measured with one output switching, fast output slew rate setting, except
t
sl
.
External Timing Parameters
Over Recommended Operating Conditions
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
–
–
143
110
4.0
3.0
4.0
3.0
2.5
1.5
4.5
0.0
1.5
0.0
1.5
0.0
1.5
0.0
–
–
–
–
–
–
–
–
3.5
3.5
–
10.0
–
–
5.0
6.5
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
5.0
8.5
6.0
9.5
6.0
6.0
9.0
9.0
–
–
14.0
–
8.0
0.5
–
–
100
80.0
5.5
4.5
5.5
4.5
3.5
2.5
6.5
0.0
2.5
0.0
2.5
0.0
2.5
0.0
–
–
–
–
–
–
–
–
5.0
5.0
–
14.0
–
–
7.0
9.0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
7.0
11.0
9.0
13.0
8.5
8.5
12.0
12.0
–
–
18.0
–
12.0
0.5
A
A
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
A
A
A
A
B
C
B
C
–
–
–
–
D
A
t
pd
t
sel
f
max (Tog.)
f
max (Ext.)
t
su1
t
su2
t
su3
t
su4
t
suce1
t
suce2
t
suce3
t
h1
t
h2
t
h3
t
h4
t
hce1
t
hce2
t
hce3
t
gco1
t
gco2
t
co1
t
co2
t
en
t
dis
t
toeen
t
toedis
t
wh
t
wl
t
rst
t
rw
t
sl
t
sk
DESCRIPTION
PARAMETER
TEST
1
COND.
( )
1
UNITS
-5
MIN. MAX.
-7
MIN. MAX.
#
相關(guān)PDF資料
PDF描述
ISPGDX160V-5B272 In-System Programmable 3.3V Generic Digital CrosspointTM
ISPGDX240VA-7B388 In-System Programmable 3.3V Generic Digital CrosspointTM
ISPGDX240VA-4B388 In-System Programmable 3.3V Generic Digital CrosspointTM
ISPGDX240VA-7B388I In-System Programmable 3.3V Generic Digital CrosspointTM
ISPGDX240VA-9B388I In-System Programmable 3.3V Generic Digital CrosspointTM
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