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參數(shù)資料
| 型號： | ISPGDX80VA-5T100I |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | PLD |
| 英文描述： | In-System Programmable 3.3V Generic Digital CrosspointTM |
| 中文描述： | EE PLD, 5 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 24/27頁 |
| 文件大小： | 346K |
| 代理商： | ISPGDX80VA-5T100I |
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24
Specifications
ispGDX80VA
I/O
Input/Output Pins
–
These are the general purpose bidirectional data pins. When used as outputs,
each may be independently latched, registered or tristated. They can also each assume one other
control function (OE, CLK/CLKEN, and MUXsel as described in the text).
This pin can be configured by the user through software to act as a
RESET
pin or as an I/O (I/O D10)
The default is
RESET
. If programmed to act as
RESET
, this pin is an active LOW Input Pin and resets
all I/O Register outputs when LOW.
Input Pins
–
These can be either Global Clocks or Clock Enables. In addition, Y1 is multiplexed with
TOE. Each pin can drive any or all I/O cell registers. The Test Output Enable (TOE) pin tristates all I/O
pins when LOW
Input Pin
–
JTAG TAP Controller Enable Pin. When high, JTAG operation is enabled. When low,
JTAG TAP controller is driven to reset.
Input Pin
–
Serial data input during ISP programming or Boundary Scan mode.
Input Pin
–
Serial data clock during ISP programming or Boundary Scan mode.
Input Pin
–
Control input during ISP programming or Boundary Scan mode.
Output Pin
–
Serial data output during ISP programming or Boundary Scan mode.
Ground (GND)
Vcc
–
Supply voltage (3.3V).
Input
–
This pin is used if optional 2.5V output is to be used. Every I/O can independently select either
3.3V or the optional voltage as its output level. If the optional output voltage is not required, this pin
must be connected to the VCC supply. Programmable pull-up resistors and bus-hold latches only draw
current from this supply.
RESET
/ I/O D10
Y1/CLKEN1/TOE,
Y0/CLKEN0
EPEN
TDI
TCK
TMS
TDO
GND
VCC
VCCIO
Signal Descriptions
Signal Name Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISPGDX80VA-7T100I | PHOTOELECTRIC PRODUCTS |
| ISPGDX80VA-9T100I | In-System Programmable 3.3V Generic Digital CrosspointTM |
| ISPL1048E-125LQI | High-Density Programmable Logic |
| ISPL1048E-100LQ | High-Density Programmable Logic |
| ISPL1048E-100LQI | High-Density Programmable Logic |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPGDX80VA-5TN100 | 功能描述:模擬和數(shù)字交叉點 IC PROGRAMMABLE GEN DIG CROSSPOINT RoHS:否 制造商:Micrel 配置:2 x 2 封裝 / 箱體:MLF-16 數(shù)據(jù)速率:10.7 Gbps 輸入電平:CML, LVDS, LVPECL 輸出電平:CML 電源電壓-最大:3.6 V 電源電壓-最小:2.375 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 產(chǎn)品:Digital Crosspoint 封裝:Tube |
| ISPGDX80VA-5TN100I | 功能描述:模擬和數(shù)字交叉點 IC PROGRAMMABLE GEN DIG CROSSPOINT RoHS:否 制造商:Micrel 配置:2 x 2 封裝 / 箱體:MLF-16 數(shù)據(jù)速率:10.7 Gbps 輸入電平:CML, LVDS, LVPECL 輸出電平:CML 電源電壓-最大:3.6 V 電源電壓-最小:2.375 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 產(chǎn)品:Digital Crosspoint 封裝:Tube |
| ISPGDX80VA-7T100 | 功能描述:模擬和數(shù)字交叉點 IC 3.3V 80 I/O RoHS:否 制造商:Micrel 配置:2 x 2 封裝 / 箱體:MLF-16 數(shù)據(jù)速率:10.7 Gbps 輸入電平:CML, LVDS, LVPECL 輸出電平:CML 電源電壓-最大:3.6 V 電源電壓-最小:2.375 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 產(chǎn)品:Digital Crosspoint 封裝:Tube |
| ISPGDX80VA-7T100I | 功能描述:模擬和數(shù)字交叉點 IC PROGRAMMABLE GEN DIG CROSSPOINT RoHS:否 制造商:Micrel 配置:2 x 2 封裝 / 箱體:MLF-16 數(shù)據(jù)速率:10.7 Gbps 輸入電平:CML, LVDS, LVPECL 輸出電平:CML 電源電壓-最大:3.6 V 電源電壓-最小:2.375 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 產(chǎn)品:Digital Crosspoint 封裝:Tube |
| ISPGDX80VA-7TN100 | 功能描述:模擬和數(shù)字交叉點 IC PROGRAMMABLE GEN DIG CROSSPOINT RoHS:否 制造商:Micrel 配置:2 x 2 封裝 / 箱體:MLF-16 數(shù)據(jù)速率:10.7 Gbps 輸入電平:CML, LVDS, LVPECL 輸出電平:CML 電源電壓-最大:3.6 V 電源電壓-最小:2.375 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 產(chǎn)品:Digital Crosspoint 封裝:Tube |
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