參數(shù)資料
型號(hào): ISPLSI2128-100LTI
廠商: Lattice Semiconductor Corporation
英文描述: In-System Programable High Density PLD
中文描述: 在系統(tǒng)可編程高密度可編程邏輯器件
文件頁(yè)數(shù): 4/19頁(yè)
文件大小: 234K
代理商: ISPLSI2128-100LTI
Specifications
ispLSI 2128VE
4
Switching Test Conditions
Figure 2. Test Load
Input Pulse Levels
Input Rise and Fall Time
Table 2 - 0003/2128VE
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
3-state levels are measured 0.5V from steady-state active level.
GND to 3.0V
1.5ns 10% to 90%
1.5V
1.5V
See Figure 2
DC Electrical Characteristics
Over Recommended Operating Conditions
Output Load Conditions (see Figure 2)
TEST CONDITION
R1
316
316
R2
348
348
348
CL
35pF
35pF
35pF
A
B
Active High
Active Low
Active High to Z
at
V
OH
C
316
348
5pF
348
5pF
Active Low to Z
at
V
+0.5V
OL
Table 2-0004/2128VE
V
OL
V
OH
I
IL
SYMBOL
1. One output at a time for a maximum duration of one second. V = 0.5V was selected to avoid test
problems by tester ground degradation. Characterized but not 100% tested.
2. Measured using eight 16-bit counters.
3. Typical values are at V = 3.3V and T = 25
°
C.
4. Maximum I varies widely with specific device configuration and operating frequency. Refer to the Power Consumption
section of this data sheet and Thermal Management section of the Lattice Semiconductor Data Book or CD-ROM to
estimate maximum I .
Table 2-0007/2128VE
1
I
IH
I
IL-isp
I
IL-PU
I
OS
PARAMETER
2, 4
I
CC
Output Low Voltage
Output High Voltage
Input or I/O Low Leakage Current
Input or I/O High Leakage Current
BSCAN
Input Low Leakage Current
I/O Active Pull-Up Current
Output Short Circuit Current
Operating Power Supply Current
I = 8 mA
I = -4 mA
0V
V
V (Max.)
IN
(V - 0.2)V
V
V
V
V
5.25V
0V
V
V
0V
V
V
V = 3.3V, V = 0.5V
V = 0.0V, V = 3.0V
f = 1 MHz
IN
IL
IN
IL
CONDITION
MIN.
2.4
TYP.
MAX.
0.4
-10
UNITS
V
V
μ
A
3
195
10
10
-150
-150
-100
μ
A
μ
A
μ
A
μ
A
mA
mA
CC
+ 3.3V
R1
R2
CL
*
Device
Output
Test
Point
*
CL includes Test Fixture and Probe Capacitance.
0213A/2128VE
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