參數(shù)資料
型號: IT8192F
英文描述: Analog LCD Monitor Controller|
中文描述: 模擬液晶顯示器控制器|
文件頁數(shù): 27/93頁
文件大?。?/td> 942K
代理商: IT8192F
www.ite.com.tw 19
www.iteusa.com
System Configuration
6. System Configuration
6.1. Overview
The configuration registers are responsible for executing the functions of DPMS, GPIO, auto-adjustment, sync.
detection, wake up, disconnection detection and interface configuration.
6.2 Features
n
GPIO: There are a total of 17 GPIO pins and each GPIO pin could be programmed as GPIO input, or as
GPIO output. Each GPIO input could be programmed as interrupt high or low active or be disabled.
Auto-adjustment: Four registers are provided to recognize the data blank information and adjust the
output image
Sync. detection: Counting pixel clock (12 MHz) number during a horizontal total, and counting Hsync line
number during a vertical total to recognize the input resolution
Wake-up, disconnected detection and DPMS: When the system is wake up or disconnected, and wake-up
or disconnection detection interrupt control bit is turned on, the IT8192F will trigger an interrupt to MCU.
The pixel counts, Hsync line counts, pixel counts overflow and Hsync line count overflow are used to
recognize the DPMS mode
Interface configuration: For system configuration, the system could be programmed to use
external/internal 8032 or use digital external panel link Rx interface or analog ADC input interface for flat
panel monitor
n
n
n
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6.3 Address Mapping
Module
Range
Decode
Space
font
C000h ~ DFFFh
110xxxxx_xxxxxxxx
8192
disp
F000h ~ F1FFh
1111000x_xxxxxxxx
512
gm – (R)
F800h ~ F8FFh
11111000_xxxxxxxx
256
gm – (G)
F900h ~ F9FFh
11111001_xxxxxxxx
256
gm – (B)
FA00h ~ FAFFh
11111010_xxxxxxxx
256
coef
FC00h ~ FDFF
1111110x_xxxxxxxx
512
cfg
FF00h ~ FF3Fh
11111111_00xxxxxx
64
scalar
FF40h ~ FF7Fh
11111111_01xxxxxx
64
lb
FF80h ~ FF9Fh
11111111_100xxxxx
32
lcd
FFA0h ~ FFBFh
11111111_101xxxxx
32
osd
FFC0h ~ FFFFh
11111111_10xxxxxx
64
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