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參數(shù)資料
| 型號(hào)： | IT8208M |
| 英文描述： | PCI Arbiter Specification v0.3 | PC Product Line |
| 中文描述： | PCI仲裁器規(guī)格v0.3 |個(gè)人電腦產(chǎn)品線 |
| 文件頁數(shù)： | 20/31頁 |
| 文件大小： | 250K |
| 代理商： | IT8208M |
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6.1.7
www.ite.com.tw
IT8203R V0.1
14
IT8203R
GPIO A Data Register (GPIOADR)— Offset 0x12
Bit
7
R/W
R/W
Default
1h
Description
Reserved
This bit must be set to one.
GPIO 5 Data bit
If GPIO 5 is an input pin, this bit will be the input value from GPIO 5.
If GPIO 5 is an output pin, this bit will be the value output to GPIO 5.
GPIO 4 Data bit
If GPIO 4 is an input pin, this bit will be the input value from GPIO 4.
If GPIO 4 is an output pin, this bit will be the value output to GPIO 4.
GPIO 3 Data bit
If GPIO 3 is an input pin, this bit will be the input value from GPIO 3.
If GPIO 3 is an output pin, this bit will be the value output to GPIO 3.
Reserved
This bit must be set to one.
GPIO 2 Data bit
If GPIO 2 is an input pin, this bit will be the input value from GPIO 2.
If GPIO 2 is an output pin, this bit will be the value output to GPIO 2.
GPIO 1 Data bit
If GPIO 1 is an input pin, this bit will be the input value from GPIO 1.
If GPIO 1 is an output pin, this bit will be the value output to GPIO 1.
GPIO 0Data bit
If GPIO 0 is an input pin, this bit will be the input value from GPIO 0.
If GPIO 0 is an output pin, this bit will be the value output to GPIO 0.
6
R/W
1h
5
R/W
1h
4
R/W
1h
3
R/W
1h
2
R/W
1h
1
R/W
1h
0
R/W
1h
6.1.8
GPIO B Data Register (GPIOBDR)— Offset 0x13
Bit
7-4
3
R/W
RO
R/W
Default
0h
1h
Description
Reserved
GPIO 9 Data bit
If GPIO 9 is an input pin, this bit will be the input value from GPIO 9.
If GPIO 9 is an output pin, this bit will be the value output to GPIO 9.
GPIO 8 Data bit
If GPIO 8 is an input pin, this bit will be the input value from GPIO 8.
If GPIO 8 is an output pin, this bit will be the value output to GPIO 8.
GPIO 7 Data bit
If GPIO 7 is an input pin, this bit will be the input value from GPIO 7.
If GPIO 7 is an output pin, this bit will be the value output to GPIO 7.
GPIO 6 Data bit
If GPIO 6 is an input pin, this bit will be the input value from GPIO 6.
If GPIO 6 is an output pin, this bit will be the value output to GPIO 6.
2
R/W
1h
1
R/W
1h
0
R/W
1h
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IT8209R | PCI Arbiter|Reference Circuit |
| IT8212F | ATA133 RAID Controller Application Note Hot Swap function | PC Product Line |
| IT8228E | LPC Media I/F Specification v0.2 | PC Product Line |
| IT8281M | Power Sequence Controller Specification IT8281M v0.1 (For Desktop Only) | PC Product Line |
| IT8282M | Power Sequence Controller Specification IT8281M v0.1 (For Desktop Only) | PC Product Line |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IT8209R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCI Arbiter|Reference Circuit |
| IT8212F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ATA133 RAID Controller Application Note Hot Swap function | PC Product Line |
| IT8228E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LPC Media I/F Specification v0.2 | PC Product Line |
| IT8281M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Power Sequence Controller Specification IT8281M v0.1 (For Desktop Only) | PC Product Line |
| IT8282M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Power Sequence Controller Specification IT8281M v0.1 (For Desktop Only) | PC Product Line |
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