參數(shù)資料
型號(hào): IT8228E
英文描述: LPC Media I/F Specification v0.2 | PC Product Line
中文描述: LPC媒體我/女規(guī)格v0.2 |個(gè)人電腦產(chǎn)品線
文件頁(yè)數(shù): 57/93頁(yè)
文件大?。?/td> 479K
代理商: IT8228E
8.5.3.10 SD Memory Card Buffer Status Register (SD_BUFSTS)
The SD Memory Card Buffer Status, an 8-bit
read/write or read only
register, responds command status.
Index: 1Eh
Bit
R/W
Default
7
R/W
0b
Illegal Access Error (ILA)
Writing “0” to this bit will clear it.
0: Normal from last clear.
1: Illegal accessing error. There are 3 cases:
Case 1:Even if transaction is active, host writes SD_CMD register.
Case 2:Software sets SD_CMD_MD[2:0]=3’b011 (no response) and
SD_CMD_MD[3]=1’b1 (with data).
Case 3:Software sets SD_CMD_MD[3]=1’b1 (with data) when
SD_CMD=8’b00001100 (CMD12) is set.
6
R
0b
Command Busy (CBSY)
0: Command transaction finished.
1: During command transaction.
5 – 2
--
0h
Reserved for ITE use.
1
R/W
0b
Write Enable (BWE)
Writing “0” to this bit will clear it.
0: Normal from the last clear.
1: Write buffer to SD Memory Card is empty. (The size is specified by
SD_SIZE)
0
R/W
0b
Read Enable (BRE)
Writing “0” to this bit will clear it.
0: Normal from the last clear.
1: Write buffer to SD Memory Card is empty. (The size is specified by
SD_SIZE)
8.5.3.11 SD Memory Card Error Register (SD_ERR)
The SD Memory Card Error, an 8-bit
read/write or read only
register, responds error messages. About Erase
command, if Timeout error (ERR3) occurs but no Response timeout error (ERR6), Software can know the end
of Erase Command by polling the DAT0 (SDA_D0 or SDB_D0) as high.
Index: 1Fh
Bit
R/W
Default
7
R
--
DAT0 (SDA_D0 or SDB_D0) of the selected port
This bit responses DAT0 of the selected port (by SD_PORTSEL).
0: DAT0 of the selected port is “0”.
1: DAT0 of the selected port is “1”.
6
R/W
0b
Response Timeout (ERR6)
Writing “0” to this bit will clear it.
0: Normal from last clear.
1: Response timeout occurs. There are two cases:
Case 1: No command responds more than 640 SDCLK cycles.
Case 2: No SD_STOP responds more than 640 SDCLK cycles.
5
R/W
0b
Illegal Read Access (ERR5)
Writing “0” to this bit will clear it.
0: Normal from the last clear.
1: Even if buffer is empty, the host still reads from it.
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IT8228E V0.2
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Functional Description
Description
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