參數(shù)資料
型號: IT8228E
英文描述: LPC Media I/F Specification v0.2 | PC Product Line
中文描述: LPC媒體我/女規(guī)格v0.2 |個人電腦產(chǎn)品線
文件頁數(shù): 72/93頁
文件大?。?/td> 479K
代理商: IT8228E
8.5.3.35 Card Detect with SDB_DAT3 Mask Register (EXT_CD_DAT3_MASK)
www.ite.com.tw
IT8228E V0.2
62
IT8228E
Index: FEh (EXT_CD_DAT3_MASK)
Bit
R/W
7 – 2
--
1
R/W
Default
--
1b
Description
Reserved for ITE use.
SDB_D3 Card Inserted Mask
0: Enables bit 1 of EXT_CD_DAT3 (SDB_D3 Card Inserted) to generate
interrupt.
1: Masks bit 1 of EXT_CD_DAT3 (SDB_D3 Card Inserted) to generate
interrupts.
SDB_D3 Card Removed Mask
0: Enables bit 0 of EXT_CD_DAT3 (SDB_D3 Card Removed) to generate
interrupt.
1: Masks bit 0 of EXT_CD_DAT3 (SDB_D3 Card Removed) to generate
interrupts.
0
R/W
1b
8.6
8.6.1
The Smart Media Host Controller provides the interface between a host processor and Smart Media I/F. The
hardware is implemented from the reference circuit of
SmartMedia
TM
Interface Library (SMIL)
.
8.6.2
Features
Flash Memory Control Interface
Eject On/Off
Lock/Unlock Function
ECC Calculation circuit
8.6.3
Register Descriptions
Table 8-4. Memory Stick Register List
Address
R/W
Default
Smart Media Host Controller
Overview
Name
Base + 0h
R/W
0--
Data Register (DATAR)
Base + 0h
R
--
Controller Identify Register (CIDR, total 12 bytes)
Base + 0h
R
--
ECC Register (ECCR, total 6 bytes)
Base + 2h
Base + 2h
Base + 4h
Base + 6h
W
00h
Mode Register (MODER)
Status Register (STSR)
Interrupt Status Register (INTSTSR)
Interrupt Mask Register (INTMSKR)
R
00h
R
00h
R
00h
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