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參數(shù)資料
| 型號： | ITF87068SQT |
| 廠商： | Intersil Corporation |
| 英文描述： | 9A, 20V, 0.015 Ohm, P-Channel, 2.5V Specified Power MOSFET(9A, 20V, 0.015Ω P溝道2.5V專用功率MOS場效應(yīng)管) |
| 中文描述： | 第9A，20V的，0.015歐姆，P溝道，2.5V的指定功率MOSFET（第9A，20V的，0.015ΩP溝道2.5V的專用功率馬鞍山場效應(yīng)管） |
| 文件頁數(shù)： | 6/12頁 |
| 文件大小： | 197K |
| 代理商： | ITF87068SQT |
6
Thermal Resistance vs Mounting Pad Area
The maximum rated junction temperature, T
JM
, and the
thermal resistance of the heat dissipating path determines the
maximum allowable device power dissipation, P
DM
, in an
application. Therefore the application’s ambient temperature,
T
A
(
o
C), and thermal resistance R
θ
JA
(
o
C/W) must be reviewed
to ensure that T
JM
is never exceeded. Equation 1
mathematically represents the relationship and serves as the
basis for establishing the rating of the part.
In using surface mount devices such as the TSSOP-8
package, the environment in which it is applied will have a
significant influence on the part’s current and maximum
power dissipation ratings. Precise determination of P
DM
is
complex and influenced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board.
2. Thenumberofcopperlayersandthethicknessoftheboard.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the
duty cycle and the transient thermal response of the part,
the board and the environment they are in.
Intersil provides thermal information to assist the designer’s
preliminary application evaluation. Figure 20 defines the
R
θ
JA
for the device as a function of the top copper
(component side) area. This is for a horizontally positioned
FR-4 board with 1oz copper after 1000 seconds of steady
state power with no air flow. This graph provides the
Test Circuits and Waveforms
FIGURE 16. GATE CHARGE TEST CIRCUIT
FIGURE 17. GATE CHARGE WAVEFORMS
FIGURE 18. SWITCHING TIME TEST CIRCUIT
FIGURE 19. SWITCHING TIME WAVEFORM
R
L
V
GS
+
-
V
DS
V
DD
DUT
I
g(REF)
V
DD
Q
g(TH)
V
GS
= -0.5V
Q
g(-2)
V
GS
= -2V
Q
g(TOT)
V
GS
= -4.5V
V
DS
-V
GS
I
g(REF)
0
0
Q
gs
Q
gd
R
GS
R
L
DUT
-V
GS
0V
+
-
V
GS
V
DS
t
d(ON)
t
r
90%
10%
V
DS
90%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
t
ON
10%
0
0
(EQ. 1)
PDM
θ
JA
–
(
------------------------------
)
=
ITF87068SQT
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