參數(shù)資料
型號: IW4052BDW
廠商: Electronic Theatre Controls, Inc.
英文描述: Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS
中文描述: 模擬多路復(fù)用多路解復(fù)用器高性能硅柵CMOS
文件頁數(shù): 1/6頁
文件大小: 196K
代理商: IW4052BDW
TECHNICAL DATA
103
Analog Multiplexer Demultiplexer
High-Performance Silicon-Gate CMOS
The IW4052B analog multiplexer/demultiplexer is digitally
controlled analog switches having low ON impedance and very low
OFF leakage current. Control of analog signals up to 20V peak-to-
peak can be achieved by digital signal amplitudes of 4.5 to 20V (if V
CC
- GND = 3V, a V
CC
- V
EE
of up to 13 V can be controlled; for V
CC
-
V
EE
level differences above 13V a V
CC
- GND of at least 4.5V is
required).
These multiplexer circuits dissipate extremely low quiescent power
over the full V
CC
-GND and V
CC
- V
EE
supply-voltage ranges,
independent of the logic state of the control signals. When a logic
“1”is present at the ENABLE input terminal all channels are off.
The IW4052 is a differential 4-channel multiplexer having two
binary control inputs. A and B, and an enable input. The two binary
input signals select 1 of 4 pairs of channels to turned on and connect
the analog inputs to the outputs.
Operating Voltage Range: 3.0 to 18 V
Maximum input current of
1
μ
A at 18 V over full package-temperature range; 100 nA at 18 V
and 25
°
C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
IW4052B
ORDERING INFORMATION
IW4052BN Plastic
IW4052BDW SOIC
T
A
= -55
°
to 125
°
C for all packages
PIN ASSIGNMENT
FUNCTION TABLE
Control Inputs
ON
Enable
Select
Channels
B
A
L
L
L
Y0
X0
L
L
H
Y1
X1
L
H
L
Y2
X2
L
H
H
Y3
X3
H
X
X
None
X = don’t care
LOGIC DIAGRAM
Double-Pole, 4-Position
Plus Common Off
PIN 16 =V
CC
PIN 7 = V
EE
PIN 8 = GND
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