參數(shù)資料
型號(hào)： IXF440
英文描述： LAN HUB CONTROLLER
中文描述： 局域網(wǎng)集線器控制器
文件頁(yè)數(shù)： 53/100頁(yè)
文件大小： 1354K
代理商： IXF440
IXF440 Multiport 10/100 Mbps Ethernet Controller
Datasheet
53
4.3.2
Header Preprocessing
The IXF440 supports the ability to process the packet header in several ways. The header size is
programmable (RX_PARAM<HDRS>) and may be changed according to the required processing
(for example, MAC header, VLAN header, or Layer3 header).
When header ready mode is enabled (FFO_BUS<HRYD>=0) and a packet header has been fully
loaded into the receive FIFO, the IXF440 will assert the rxrdy signal, even if the header size is
smaller than the programmed receive threshold. In this instance, the first burst of a packet must be
shorter than or equal to the header size.
The packet header may also be read from the receive FIFO for processing without removing it from
the FIFO. If the IXF440 is programmed to work in the header replay mode
(RX_PARAM<HRPL>), the packet header will be transferred twice onto the IX Bus: the first time
for header processing and the second time with the packet transfer.
4.3.3
Packet Segmentation
The IXF440 supports receive packet segmentation on any byte boundaries. When the rxkep signal is
asserted on the last cycle of a burst, the last data transfer of that burst will be reissued on the next burst.
The rxkep signal is ignored when it is asserted in one of the following cases: nonvalid data, last
data of the packet, or last data of the header on header replay mode (RX_PARAM<HRPL>).
In the example, rxkep is asserted on the last cycle of a three octal word burst from the IXF440,
causing the third octal word to be retained in the receive FIFO. During the next receive burst, this
same octal word will be driven as the first data word of the burst. Any masking of data bytes to the
buffers is performed by the host. In the example, the host places bytes 1
–
19 in the first buffer (a
result of the first burst) and bytes 20
–
28 in the second buffer (a result of the second burst).
Buffer 1:
Buffer 2:
4.3.4
Packet Abortion
During the transfer of a received packet onto the IX Bus, the IXF440 supports the ability to prevent
any further transfer of this packet. At any time during packet reception, the packet may be
dynamically discarded from the receive FIFO by asserting the rxabt signal during packet reading.
Any subsequent packet loaded into the receive FIFO is not affected by rxabt assertion. The next
FIFO access will be the next packet.
B8
B7
B6
B5
B4
B3
B2
B1
B16
B15
B14
B13
B12
B11
B10
B9
X
X
X
X
X
B19
B18
B17
B24
B23
B22
B21
B20
X
X
X
–
replayed
X
X
X
X
B28
B27
B26
B25
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