- 您現在的位置：買賣IC網 > PDF目錄362819 > IXF440 LAN HUB CONTROLLER PDF資料下載
參數資料
| 型號： | IXF440 |
| 英文描述： | LAN HUB CONTROLLER |
| 中文描述： | 局域網集線器控制器 |
| 文件頁數： | 96/100頁 |
| 文件大小： | 1354K |
| 代理商： | IXF440 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁當前第96頁第97頁第98頁第99頁第100頁
IXF440 Multiport 10/100 Mbps Ethernet Controller
Datasheet
95
Joint Test Action Group – Test Logic
A
This appendix describes the joint test action group (JTAG) test logic and the associated registers.
A.1
General Description
JTAG test logic supports testing, observation, and modification of circuit activity during normal
operation of the components. The IXF440 supports the IEEE Standard 1149.1 Test Access Port and
Boundary Scan Architecture. The IXF440 JTAG test logic allows boundary scan to be used to test
both the device and the board it is installed in. The JTAG test logic consists of the following four
signals to serially interface within the IXF440:
tck
–
JTAG clock
tdi
–
Test data and instructions in
tdo
–
Test data and instructions out
tms
–
Test mode select
Note:
If JTAG test logic is not used, the tck pin should be connected to
“
0
”
, and both the tms and tdi pins
should be connected to
“
1
”
. The tdo signal should remain unconnected.
If JTAG logic is used, a 1149.1 ring is created by connecting one device
’
s tdo pin to another
device
’
s tdi pin and so on, to create a serial chain of devices. In this application, the IXF440
receives the same tck and tms signals as the other devices. The entire 1149.1 ring is connected to
either a motherboard test connector for test purposes or to a resident 1149.1 controller.
A.1.1
Test Access Port Controller
The test access port (TAP) controller interprets IEEE P1149.1 protocols received on the tms pin.
The TAP controller generates clocks and control signals to control the operation of the test logic.
The TAP controller consists of a state machine and a control dispatch logic. The IXF440 fully
implements the TAP state machine as described in the IEEE P1149.1 Standard.
A.2
Registers
In JTAG test logic, three registers are implemented in the IXF440:
Instruction register
Bypass register
Boundary-scan register
相關PDF資料 |
PDF描述 |
|---|---|
| IXF6048 | Telecommunication IC |
| IXFH42N20S | TRANSISTOR | MOSFET | N-CHANNEL | 200V V(BR)DSS | 42A I(D) | TO-247VAR |
| IXFH4N100Q | TRANSISTOR | MOSFET | N-CHANNEL | 1KV V(BR)DSS | 4A I(D) | TO-247AD |
| IXFH50N20S | TRANSISTOR | MOSFET | N-CHANNEL | 200V V(BR)DSS | 50A I(D) | TO-264AA |
| IXFH58N20S | TRANSISTOR | MOSFET | N-CHANNEL | 200V V(BR)DSS | 58A I(D) | TO-247VAR |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IXF-45A15AF | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Crystal Filter 3 Lead Metal Package |
| IXF-45A15AT | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Crystal Filter 3 Lead Metal Package |
| IXF-45A15BF | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Crystal Filter 3 Lead Metal Package |
| IXF-45A15BT | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Crystal Filter 3 Lead Metal Package |
| IXF-45A15CF | 制造商:ILSI 制造商全稱:ILSI America LLC 功能描述:Crystal Filter 3 Lead Metal Package |
發(fā)布緊急采購，3分鐘左右您將得到回復。