參數(shù)資料
型號: JS28F256P30T85
廠商: INTEL CORP
元件分類: DRAM
英文描述: Intel StrataFlash Embedded Memory
中文描述: 16M X 16 FLASH 1.8V PROM, 88 ns, PDSO56
封裝: 14 X 20 MM, LEAD FREE, TSOP-56
文件頁數(shù): 94/102頁
文件大?。?/td> 1609K
代理商: JS28F256P30T85
1-Gbit P30 Family
April 2005
94
Intel StrataFlash
Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
C.2
Query Structure Overview
The Query command causes the flash component to display the Common Flash Interface (CFI)
Query structure or “database.” The structure sub-sections and address locations are summarized
below.
Table 33.
Query Structure
Notes:
1.
Refer to the Query Structure Output section and offset 28h for the detailed definition of offset address as
a function of device bus width and mode.
BA = Block Address beginning location (i.e., 08000h is block 1’s beginning location when the block size
is 16-KWord).
Offset 15 defines “P” which points to the Primary Intel-specific Extended Query Table.
2.
3.
Word Addressing:
Hex Code
Byte Addressing:
Hex Code
Offset
A
X
–A
0
00010h
00011h
00012h
00013h
00014h
00015h
00016h
00017h
00018h
...
Value
Offset
A
X
–A
0
00010h
00011h
00012h
00013h
00014h
00015h
00016h
00017h
00018h
...
Value
D
15
–D
0
D
7
–D
0
0051
0052
0059
P_ID
LO
P_ID
HI
P
LO
P
HI
A_ID
LO
A_ID
HI
...
"Q"
"R"
"Y"
51
52
59
"Q"
"R"
"Y"
PrVendor
ID #
PrVendor
TblAdr
AltVendor
ID #
...
P_ID
LO
P_ID
LO
P_ID
HI
...
PrVendor
ID #
ID #
...
Offset
00001-Fh Reserved
00010h
0001Bh
00027h
P
(3)
Sub-Section Name
Description
(1)
Reserved for vendor-specific information
Command set ID and vendor data offset
Device timing & voltage information
Flash device layout
CFI query identification string
System interface information
Device geometry definition
Primary Intel-specific Extended Query Table Vendor-defined additional information specific
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