參數(shù)資料
型號: K3S7V2000M-TC10
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 64M-Bit (4Mx16 /2Mx32) Synchronous MASKROM
中文描述: 6400位(4Mx16 / 2Mx32)同步MASKROM
文件頁數(shù): 3/27頁
文件大小: 1080K
代理商: K3S7V2000M-TC10
K3S7V2000M-TC
Synch. MROM
PIN FUNCTION DESCRIPTION
Note1. V
DD
and V
DD
Q is same voltage.
PIN
NAME
INPUT FUNCTION
CLK
System Clock
Active on the rising edge to sample all inputs.
CS
Chip Select
Disables or enables device operation by masking or enabling all inputs except
CLK and CKE.
CKE
Clock Enable
Masks system clock to freeze operation from the next clock cycle. CKE should be
enabled at least one cycle prior to new command. Disables input buffers for power down
in standby mode.
A
0
~ A
12
Address
Row / Column addresses are multiplexed on the same pins.
Row address: RA
0
~ RA
12
, Column address: CA
0
~ CA
7
(x32): CA
0
~ CA
8
(x16)
RAS
Row Address Strobe
Latches row addresses on the rising edge of the CLK with RAS low.
Enables row access
CAS
Column Address Strobe
Latches column addresses on the rising edge of the CLK with CAS low.
Enables column access.
MR
Mode Register Set
Enables mode register set with MR low. (Simultaneously CS,RAS and CAS are low)
Q
0
~ Q
31
Data Output
V
DD
/V
SS
Power Supply/Ground
Power and ground for the input buffers and the core logic.
V
DD
Q
/V
SS
Q
Data Output Power/
Ground
Power and ground for the output buffers.
WORD
x32/x16 Mode Selection
Double word mode/word mode, depending on polarity of WORD pin.
Should be set before CAS enabling.
DQM
Data-out Masking
It works similar to OE during read operation.
N.C
No Connection
This pin is recommended to be left No Connection on the device.
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