參數(shù)資料
型號: K4B1G0846C-ZCF7
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 1Gb C-die DDR3 SDRAM Specification
中文描述: 1Gb的?芯片的DDR3 SDRAM規(guī)范
文件頁數(shù): 28/63頁
文件大?。?/td> 1255K
代理商: K4B1G0846C-ZCF7
Page 28 of 63
Rev. 1.0 June 2007
1Gb DDR3 SDRAM
K4B1G04(08/16)46C
VDDQ
CK,CK
DUT
DQ, DM
DQS , DQS
TDQS , TDQS
RTT
=25 ohm
VTT=
VSSQ
Timing Reference Points
BD_REFLOAD_ODT
9.9.2 ODT Timing Definition
Definitions for t
AON
, t
AONPD
, t
AOF
, t
AOFPD
and t
ADC
are provided in Table28 and subsequent figures. Measurement reference settings
are provided in Table29.
[ Table 28 ] ODT Timing Definitions
[ Table 29 ] Reference Settings for ODT Timing Measurements
Symbol
Begin Point Definition
End Point Definition
Figute
t
AON
t
AONPD
t
AOF
t
AOFPD
Rising edge of CK - CK defined by the end point of ODTLon
Extrapolated point at VSSQ
Figure 2
Rising edge of CK - CK with ODT being first registered high
Extrapolated point at VSSQ
Figure 3
Rising edge of CK - CK defined by the end point of ODTLoff
End point: Extrapolated point at VRTT_Nom
Figure 4
Rising edge of CK - CK with ODT being first registered low
End point: Extrapolated point at VRTT_Nom
Figure 5
t
ADC
Rising edge of CK - CK defined by the end point of ODTLcnw,
ODTLcwn4 of ODTLcwn8
End point: Extrapolated point at VRTT_Wr and
VRTT_Nom respectively
Figure 6
Measured
Parameter
RTT_Nom Setting
RTT_Wr Setting
V
SW1
[V]
V
SW2
[V]
Note
t
AON
R
ZQ
/4
R
ZQ
/12
R
ZQ
/4
R
ZQ
/12
R
ZQ
/4
R
ZQ
/12
R
ZQ
/4
R
ZQ
/12
R
ZQ
/12
NA
0.05
0.10
NA
0.10
0.20
t
AONPD
NA
0.05
0.10
NA
0.10
0.20
t
AOF
NA
0.05
0.10
NA
0.10
0.20
t
AOFPD
NA
0.05
0.10
NA
0.10
0.20
t
ADC
R
ZQ
/2
0.20
0.30
VSSQ
Figure 14. ODT Timing Reference Load
9.9 ODT Timing Definitions
9.9.1 Test Load for ODT Timings
Different than for timing measurements, the reference load for ODT timings is defined in Figure 14.
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